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Difference: TDCprogrammingViaJam (r13 vs. r12)

How to generate jam and tcl files

In view of growing number of TRBs the make.pl perl script was made to produce jam files with TDC settings and channels enabled/disabled as well as tcl file with settings for TRBs.

The script takes three input configuration files:

  • config/default_TDC_setup.conf (default settings for TDC)
  • config/default_TDC_channels.conf (default channels status for TDC)
  • config/default_TRB_setup.conf (default settings for TRB)
  • config/TRB_TDC_settings.conf (new settings and new channels status
    for all TDCs on all TRBs)

The script produces two jam output files per TRB:
outdata/TRB_001_TDC_setup.jam (settings for 4 TDCs)
outdata/TRB_001_TDC_channels.jam (channels status for 4 TDCs)
outdata/TRB_002_TDC_setup.jam
outdata/TRB_002_TDC_channels.jam
...
and one tcl file with settings for all TRBs:
outdata/trb_p.tcl

For every TDC and TRB the default settings are overwritten by the new settings taken from config/TRB_TDC_settings.conf.

The script has a built-in setting of tdc_id for 4 TDCs:

  • "TDC_A" tdc_id=0000
  • "TDC_B" tdc_id=0001
  • "TDC_C" tdc_id=0010
  • "TDC_D" tdc_id=0011

sub_evt_id from trb_p.tcl is automatically incremented according to TRB number but can be overwritten by the new settings taken from config/TRB_TDC_settings.conf.

Command line: make.pl [-h|--help] [-g|--gen TRB_first_num -g|--gen TRB_last_num] [-j|--jam] [-t|--tcl]

To get a help:
./make.pl -h|--help
To generate config/TRB_TDC_settings.conf.sample for the TRBs with numbers from 1 till 20:
./make.pl -g 1 -g 20
To create jam files:
./make.pl -j
To create tcl file:
./make.pl -t

To get this project from CVS:
cvs -d :ext:hadaq@lxi002.gsi.de:/misc/hadesprojects/daq/cvsroot/ checkout trbtdctools

-- SergeyYurevich - 12 Jul 2007

Old program for trbv1

-- MarekPalka - 15 Jul 2005

Program creates all needed .jam files to programm and test TDC
Usage:makeTDCjam -c/s/l i-inputfile o-outputfile [-a|-b|-c|-d|-e|-f|-g|-h|-j|-k|-m]

-a: -- coretest Access to internal coretest scan registers (production testing)
-b: -- extest. Boundary scan for test of inter-chip connections on module.
-c: -- Control_file Create file do download data to control register. Needs i,o paramters
-d: -- INTEST Using boundary scan registers to test chip itself.
-e: -- BIST Memory self tests (production testing)
-f: -- Readout Read of TDC output data via JTAG
-g: -- IDCODE Scan out of chip identification code.
-h -- Help View makeTDCjam help
-i: -- Input_file Name of control or setup .jam file wich has to be created
-j: -- SAMPLE Sample of all chip pins via boundary scan registers.
-k: -- SCAN Scan of all internal flip-flops (production testing)
-l -- Start_files Files use to start up TDC (PLL, DLL reset)Needs: i,o parameters
-m: -- Status Read of status information
-o: -- Output_file Name of control or setup .jam file wich has to be created
-s -- Setup_file To download data into setup registers.Needs: i,o parameterts
Right format of data:

#JTAG instructions-Setup register(part of config file)

[3:0]_he #Selection of test output signal (for testing),hexadecimal style
[4]_b1 #Mark events with error if global error signal set, binary style
[5]_b0 #Bypass TDC chip if global error signal set,binary style
[16:6]_b11111111111 #Enable of internal error types for generation of global error signal, binary style
[19:17]_b000 #Serial transmission speed in single cycle mode, binary style
[23:20]_b0000 #Programmable delay of serial input Time unit ~ 1ns, binary style
[83:72]_d156 #march winwdow in clock cyckles, decimal style

... In some cases when bit field is too large it can be divided to smaller parts e.g.:

[16:6]_b11111111111 #Enable of internal error types for generation of global error signal
|
V
[6]_b1 #Enable vernier error (DLL unlocked or excessive jitter)
[7]_b1 #Enable coarse error (parity error on coarse count)
[8]_b1 #Enable channel select error (synchronisation error)
....

Example of creating setup.jam file:
1: makeTDCjam -isetup.txt -osetup.jam -s

  • setup.txt - name of file with configuration of setp registers
  • setup.jam - name of file witch will be created
  • -s -create setup.jam from setup.dat

2: makeTDCjam -mstatus.jam

  • status.jam - name of .jam file witch is used to read out status information from TDC
  • -m - create status.jam


All files are in CVS:
account: hadaq
cvsroot: /misc/hadaq/cvsroot/
module: rpctrbtdc

So, the following will check out the module: cvs -d :ext:hadaq@lxi007:/misc/hadaq/cvsroot co rpctrbtdc

setup.txt is configuratoin file to setup registers.
control.txt is configuratoin file to control registers.
makeTDCjam.cpp is source code file witch generate all needed files to program or test HPTDC

Comments from Michael:

  • When we discussed the human-readable format we agreed on a syntax like this:
EnableTDCGroupHeader = 1
EnableTDCGroupTrailer = 1
# Set the Window with of the TDC, values in picoseconds
TDCWindowWidth = 10

The current format: [bit-range]= value is OK.

Michael

IAttachmentActionSorted descendingSizeDateWhoComment
control.txttxtcontrol.txtmanage 0.4 K 19 Jul 2005 - 14:07MarekPalka Configuration file to control registers
setup.txttxtsetup.txtmanage 9.2 K 19 Jul 2005 - 14:07MarekPalka Configuration file to setup registers

Revision r13 - 24 Jul 2007 - 13:35 - MarekPalka
Revision r12 - 23 Jul 2007 - 12:14 - SergeyYurevich
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