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  • DatawordOutput - a few examples of interpreted data streams read out from one Endpoint
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Hardware

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HardwareUp-to-date information about all ongoing and planned work

Please update this list regularly! I think this will help all of us to keep a better overview of the whole project.
 
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  • OEPReadoutTest - Analyzing files to check OEP / Chamber functionality
  • MBBlackList - Vladimir and Olga's list of not working MB or noise channels from the latest beam time (Nov10)
  • MBTestLab - How to test MB in the lab: start DAQ and analysis
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  • ListOfAllSpareMBBoards - Current place and status of all spare MBs. Report about their test in the lab
  • OEPBandMBLogbook - Logbook of the OEPB and MB which had a failure and had to be exchanged during the commissioning
  • CommissioningLogBook - List of the activities and to-do list before the coming beam time (august 2011).
 

Timeschedule

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MDC FEE (Motherboards and OEP) commissioning: 2011

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  • PeopleInvolved - List of people who are involved in the commissioning process and time table
 
  • FeeTests - List of tasks for the coordinated works in February-April 2011
  • WorkLogBook - Logbook for all test activities
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  • OEPReadoutTest - Analyzing files to check OEP / Chamber functionality
  • MBBlackList - Vladimir and Olga's list of not working MB or noise channels from the latest beam time (Nov10)
  • MBTestLab - How to test MB in the lab: start DAQ and analysis
 

Timeschedule

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  • OepToDoList List of things still need to be done in Oep code
 

Readout

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MDC FEE (Motherboards and OEP) commissioning: 2011

  • FeeTests - List of tasks for the coordinated works in February-April 2011
  • WorkLogBook - Logbook for all test activities
  • CriteriaToProofTheFEE - description of the criteria and how to run the macro to analyse a .hld file
  • DataTestLogBook - Logbook for all taken test data & results

Timeschedule

 

Old Stuff

Old stuff formerly listed on this page has been moved to MDCUpgradeOld
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Readout

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Hardware

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Hardware Tests

  • HardwareTest - temperature, voltage translators and jitter tests
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Readout Setup v1 : AddOnv1 and other outdated information

Rossendorf Dec07 discussion

In Rossendorf we had a discussion about the MDC readout project. The RossendorfDec07Minutes can be found here.

Task

We should connect 16 motherboards to the add_on card to read out one Mdc sector. Each transceiver (sn75976A) has 20 pins (9 channels). We have two transceivers for each motherboard and we want to read out 10 buses. So, the addon board receives as input signals about 180 data lines. It converts again the differential signal into TTL signals. The FPGA (VIRTEX from XILINX) receives Mdc information, process this data (LVL2 algorithm...) and sends this data to the TRB v2 through a 2 X 20 pins connectors (QTE-020-02-F-D-A).

Addon board design ideas

In this picture the transceiver used are (sn75976A).

What the Virtex in the addon board has to do:

-- AttilioTarantola - 27 Sep 2006

In this document a block diagram shows the main ideas to collect data from 16 motherboards as fast as possible.

Here the state machines I want to implement in my VHDL.

MDC-AddOn board documentation

Transceiver discussion

-- AttilioTarantola - 11 Aug 2006

Here a document in which I compare the main characteristic of the transceivers we are thinking to use. I compare transceivers from Texas Instrument, Analog Devices and Intersil.

MDC Add-Onv1: Data structure

-- AttilioTarantola - 28 Feb 2008

Here you find the structure of the data which is produced by the Add-On board. This data is transmitted to the TRB through the LVDS and TTL lines. The data bus is 26 bits width. In the first dataword I encode debug information: token back or not, bus number, event type (normal event or calibration event) and number of dataword in the event:

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
token status event type bus number (0..9) 0 0 0 0 Dataword number in the event

token status bit(25,24) 01 token is back to MDC Add-On.

token status bit(25,24) 10 token is NOT back to MDC Add-On. In this case the readout doesn't stop. It continuously runs with the error bit indicated.

The dataword structure which follow, will look like:

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Motherboard number(1..3) Bus number (0..15) TDC number (1..12) TDC Channel# 12-14:ch#(0..7), 11: hit#(0,1) Data

-- AttilioTarantola - 15 Mar 2008
  • few events: Data with the new data format. Calibration and TDC data sample. BUS 0 (or BUS A). Data coming from one short MB. I calibrate few channels per TDC.

How to start the MDC DAQ using Add-Onv1

-- AttilioTarantola - 15 Apr 2008

1. login in the ETRAX as ROOT.

2. program FPGA on TRB: ./TRBv2b_MDC.sh

3. set the environment: export DAQ_SETUP=pion9

4. program the FPGA on Add-On: /home/hadaq/jamv2_addon -aRUN_XILINX_PROC /home/hadaq/Mdc_addon/plane_one/mdc_trb.stapl

5. enable calibration trigger: ./rw_mdc_addon w 0 0E 0

or disable calibration trigger: ./rw_mdc_addon w 0 0E 1

6. set the number of MBs which are connected to BUS 0:

(1 short MB): ./rw_mdc_addon w 0 7 1

(2 short MBs): ./rw_mdc_addon w 0 7 2

(1 long MB): ./rw_mdc_addon w 0 7 3

(2 long MBs): ./rw_mdc_addon w 0 7 4

7. reset: ./reset_fpga

8. begin run trigger: ./rwv2 w 0 6 80

9. start readout: ./readout_verbose -w 32000 -o UDP:192.168.0.1:30000

ROC and CAL configuration files

Configuration data for BUS0:

* MDC configuration data: MDC configuration data: BUS0

Howto change ROC/CAL parameters via Etrax

In the FPGA (Virtex) on the MDC Add-On the configuration data for BUS0 is stored in a RAM memory. If you want to change the configuration data, use the ./rw_mdc_addon program in "write mode" and set the device on number 5.

i.e. If on the BUS0, 1 long MB is connected and you want to set the threshold to 43, use the following commands:

./rw_mdc_addon w 5 17D 43

./rw_mdc_addon w 5 17F 43

./rw_mdc_addon w 5 181 43

./rw_mdc_addon w 5 183 43

./rw_mdc_addon w 5 185 43

./rw_mdc_addon w 5 187 43

If you want to verify the value you wrote use the rw_mdc_addon program in "read mode":

./rw_mdc_addon r 5 17D

./rw_mdc_addon r 5 17F

./rw_mdc_addon r 5 181

./rw_mdc_addon r 5 183

./rw_mdc_addon r 5 185

./rw_mdc_addon r 5 187

MDC Add-On and GP Add-On board display(SLR 2016)

- Cornelius Kleiner and Christian Kern - 22 Jul 2008

Event size in Au+Au collision at 1GeV for one MDC chamber:

Event size in Au + Au collision at 1GeV (J.Wustenfeld diplomarbeit)

20 particles for each chamber (6 layers), he supposes 20 channels fire

20(particles) X 6 (layers) X 2 (hits: l/t edges) = 240 datawords for all chains (16 motherboards) (here just estimation since it is possible that one particle let fire more than one TDC channel)

240(datawords) X 21 bits each = 5 Kbits

The FIFO (EVENT COLLECTOR),in the block diagram, has to take 5 Kbits, corresponding to the event of 20 particles firing.

Suppose LVL1: 10^5 reactions/sec (or one LVL1 each 10 μsec ) and between the LVL1 and the LVL2 there are 150 μsec, I have to be able to store 15 events in the FIFO(event collector) for example. Approximately its size should be: 15 (events) X 5 (Kbits each) = 75 Kbits.
  • Some "realisitic" estimation by C.Muentz: 7 wires per hit, add 10% noise -> equivalent to 8 wires per hit ("realistic estimate" from Ar+KCl). According to RQMD (M.Heilmann) the first plane is hit by 220 charged particels (central Au+Au at 1.5GeV) -> 37 hits per sector. Result: 37 x 8 x 2 = 568 datawords. This corresponds to 11.9 Kbits per event and chamber. Consequently, the FIFO size has to be (15 events stored): 180 Kbits.

I may suppose to transfer from my board to the TRB at this rate: 10^5 Hz x 5 Kbits = 500 Mbits/s
  • According to RQMD (M.Heilmann), central Au + Au at 1.5GeV:
PLANE I -> 220 charged particels -> 37 hits per sector -> 568 datawords -> 11.9 Kbits per event and chamber

PLANE II -> 190 charged particels -> as plane I

PLANE III -> -

PLANE IV -> 110 charged particels -> 18 hits per sector -> 288 datawords -> 5.5 Kbits per event and chamber

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META FILEATTACHMENT attr="" comment="Michael's ideas for MDC readout" date="1152519427" name="MDC-setup.pdf" path="MDC-setup.pdf" size="286335" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="more about the addon board.." date="1152863913" name="presentazione_myboard.pdf" path="presentazione_myboard.pdf" size="300447" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="tranceivers" date="1155291167" name="comparison_transceivers.pdf" path="comparison_transceivers.pdf" size="176524" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="QTE pins ideas" date="1155291547" name="pin_myboard.pdf" path="pin_myboard.pdf" size="37110" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="block diagramm" date="1159970199" name="block_diagramm_readout.pdf" path="block_diagramm_readout.pdf" size="18901" user="AttilioTarantola" version="1.2"
META FILEATTACHMENT attr="" comment="state machines" date="1159360056" name="my_state_machine_v2.pdf" path="my_state_machine_v2.pdf" size="54686" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="layout" date="1159969289" name="drawing_myboard.pdf" path="drawing_myboard.pdf" size="47886" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="layout_v2" date="1159969332" name="drawing_myboard_v2.pdf" path="drawing_myboard_v2.pdf" size="58021" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="dataword sample" date="1205615615" name="cal_and_norm_data.txt" path="cal_and_norm_data.txt" size="6112" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="MDC configuration data: BUS0" date="1208769835" name="config_virtex_ram.txt" path="config_virtex_ram.txt" size="4015" user="AttilioTarantola" version="1.1"
 
META FILEATTACHMENT attr="h" comment="display VHDL source code" date="1216732865" name="display_ctrl.vhd" path="display_ctrl.vhd" size="17157" user="AttilioTarantola" version="1.1"
META TOPICMOVED by="MichaelTraxler" date="1152694431" from="DaqSlowControl.Integration-adaptionOfTheMDC-read-outMotherboardsToTRBV2" to="DaqSlowControl.DaqUpgradeMDCOverview"
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Here are listed where the OEPB are used and their current status.

MdcDcLvl1

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Weekly MDC Readout Upgrade Meeting

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Readout via OEP and MDC Optical AddOn

 
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MDC - OEP testing, mounting, commissioning

 
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Cooperation with Yanyu Wang for the new MDC-driver cards

 
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Talk about the current status of the MDC-Optical-Endpoint

Given by Michael in the EE-Meeting, 2008-06-02 : Talk
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Readout

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  • DatawordOutput - a few examples of interpreted data streams read out from one Endpoint
 
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Configuration & Slow Control

  • DebugLists - Debug information which should be monitored
  • FlashProgramming - Overview of commands of the Flash chip. This functionality is given by Ludwig's trbflash tool which is documented elsewhere.
  • HowToRuntheDaq - list of configuration registers for the TDC
 
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MDC Add-On and GP Add-On board display(SLR 2016)

- Cornelius Kleiner and Christian Kern - 22 Jul 2008
 
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OEPB: Debug information which should be monitored

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OEPB: Collection of Important documents (schematics,pinout)

 
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OEPB: How to run the DAQ via OEPB and MDC-OpticalAddon

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Readout Setup v1 : AddOnv1 and other outdated information

 
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Rossendorf Dec07 discussion

In Rossendorf we had a discussion about the MDC readout project. The RossendorfDec07Minutes can be found here.
 
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MDC-AddOn board documentation

 
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Task

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Task

 

We should connect 16 motherboards to the add_on card to read out one Mdc sector. Each transceiver (sn75976A) has 20 pins (9 channels). We have two transceivers for each motherboard and we want to read out 10 buses.
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Transceiver discussion

-- AttilioTarantola - 11 Aug 2006

Here a document in which I compare the main characteristic of the transceivers we are thinking to use. I compare transceivers from Texas Instrument, Analog Devices and Intersil.

Rossendorf Dec07 discussion

-- BurkhardKolb - 14 Dec 2007

In Rossendorf we had a discussion about the MDC readout project. The RossendorfDec07Minutes can be found here.

Weekly MDC Readout Upgrade Meeting

-- MdcReadoutupgrademeeting

Addon board design ideas

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Addon board design ideas

 

In this picture the transceiver used are (sn75976A).
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What the Virtex in the addon board has to do:

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What the Virtex in the addon board has to do:

 

-- AttilioTarantola - 27 Sep 2006
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Here the state machines I want to implement in my VHDL.
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MDC Add-Onv1: Data structure

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MDC-AddOn board documentation

Transceiver discussion

-- AttilioTarantola - 11 Aug 2006

Here a document in which I compare the main characteristic of the transceivers we are thinking to use. I compare transceivers from Texas Instrument, Analog Devices and Intersil.

MDC Add-Onv1: Data structure

  -- AttilioTarantola - 28 Feb 2008

Here you find the structure of the data which is produced by the Add-On board. This data is transmitted to the TRB through the LVDS and TTL lines.
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  -- AttilioTarantola - 15 Mar 2008
  • few events: Data with the new data format. Calibration and TDC data sample. BUS 0 (or BUS A). Data coming from one short MB. I calibrate few channels per TDC.
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How to start the MDC DAQ using Add-Onv1

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How to start the MDC DAQ using Add-Onv1

  -- AttilioTarantola - 15 Apr 2008

1. login in the ETRAX as ROOT.
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9. start readout: ./readout_verbose -w 32000 -o UDP:192.168.0.1:30000
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State Machine description

State Machine registers

 
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ROC and CAL configuration files

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ROC and CAL configuration files

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* MDC configuration data: MDC configuration data: BUS0
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Howto change ROC/CAL parameters via Etrax

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Howto change ROC/CAL parameters via Etrax

  In the FPGA (Virtex) on the MDC Add-On the configuration data for BUS0 is stored in a RAM memory. If you want to change the configuration data, use the ./rw_mdc_addon program in "write mode" and set the device on number 5.

i.e. If on the BUS0, 1 long MB is connected and you want to set the threshold to 43, use the following commands:
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./rw_mdc_addon r 5 187
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MDC Add-On and GP Add-On board display(SLR 2016)

- Cornelius Kleiner and Christian Kern - 22 Jul 2008
 

Event size in Au+Au collision at 1GeV for one MDC chamber:

Event size in Au + Au collision at 1GeV (J.Wustenfeld diplomarbeit)
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PLANE IV -> 110 charged particels -> 18 hits per sector -> 288 datawords -> 5.5 Kbits per event and chamber
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META FILEATTACHMENT attr="" comment="my_addon board" date="1152519299" name="attilio_addonboard.pdf" path="attilio_addonboard.pdf" size="130258" user="AttilioTarantola" version="1.1"
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META FILEATTACHMENT attr="" comment="more about the addon board.." date="1152863913" name="presentazione_myboard.pdf" path="presentazione_myboard.pdf" size="300447" user="AttilioTarantola" version="1.1"
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Weekly MDC Readout Upgrade Meeting

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Addon board design ideas

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MDC-Optical-Endpoint: Board Status

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Cooperation with Yanyu Wang for the new MDC-driver cards

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MDC Add-On and GP Add-On board display(SLR 2016)

- Cornelius Kleiner and Christian Kern - 22 Jul 2008
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MDC Add-On and GP Add-On board display(SLR 2016)

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MDC-AddOn board documentation

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Task

We should connect 16 motherboards to the add_on card to read out one Mdc sector.
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9. start readout: ./readout_verbose -w 32000 -o UDP:192.168.0.1:30000
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MDC End Point: Data structure

-- AttilioTarantola - 11 Mar 2008

From a meeting with Jan Michel (10.03.2008) in order to use the TRB net (End point) we should change the dataword structure. Here a first draft we might get as starting point for further discussions:

The Header is generated by the End Point. Here we have the address of the MB (unique, given by the temperature sensor).

The dataword (32 bits) might look like:
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
trigger type TDC number (1..12) TDC Channel# Data (Hit 1) Data (Hit 0)

As one can see, we use one 32 bits dataword for both hits (0 and 1). In each dataword we can set the trigger type (calibration, normal,..).

The event is terminated with a 32 bits dataword which contains error bits (token back or not..), number of dataword in the event,the trigger tipe and additional statistics...

 

State Machine description

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MDC Add-On and GP Add-On board display(SLR 2016)

- Cornelius Kleiner and Christian Kern - 22 Jul 2008
 

MDC-AddOn board documentation

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META FILEATTACHMENT attr="" comment="my_addon board" date="1152519299" name="attilio_addonboard.pdf" path="attilio_addonboard.pdf" size="130258" user="AttilioTarantola" version="1.1"
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META FILEATTACHMENT attr="" comment="more about the addon board.." date="1152863913" name="presentazione_myboard.pdf" path="presentazione_myboard.pdf" size="300447" user="AttilioTarantola" version="1.1"
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Talk about the current status of the MDC-Optical-Endpoint

Given by Michael in the EE-Meeting, 2008-06-02 : Talk

MDC-Optical-Endpoint:

AddOn board display

entity Descriptio

something....

code....

something...

datasheet

 

MDC-AddOn board documentation

Task

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25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
token status event type bus number (0..9) 0 0 0 0 Dataword number in the event
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The dataword structure will look like the following:
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token status bit(25,24) 01 token is back to MDC Add-On.

token status bit(25,24) 10 token is NOT back to MDC Add-On. In this case the readout doesn't stop. It continuously runs with the error bit indicated.

The dataword structure which follow, will look like:
 

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Motherboard number(1..3) Bus number (0..15) TDC number (1..12) TDC Channel# 12-14:ch#(0..7), 11: hit#(0,1) Data
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MDC addonv1: Data structure

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MDC Add-Onv1: Data structure

  -- AttilioTarantola - 28 Feb 2008

Here you find the structure of the data which is produced by the Add-On board. This data is transmitted to the TRB through the LVDS and TTL lines.
Line: 81 to 81
 

3. set the environment: export DAQ_SETUP=pion9
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4. programm the FPGA on Add-On:
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4. program the FPGA on Add-On:
  /home/hadaq/jamv2_addon -aRUN_XILINX_PROC /home/hadaq/Mdc_addon/plane_one/mdc_trb.stapl

5. enable calibration trigger: ./rw_mdc_addon w 0 0E 0

or disable calibration trigger: ./rw_mdc_addon w 0 0E 1
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6. set how many MBs are connected to BUS 0:
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6. set the number of MBs which are connected to BUS 0:
 

(1 short MB): ./rw_mdc_addon w 0 7 1

Line: 96 to 96
 

(1 long MB): ./rw_mdc_addon w 0 7 3

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(3 long MBs): ./rw_mdc_addon w 0 7 4
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(2 long MBs): ./rw_mdc_addon w 0 7 4
 

7. reset: ./reset_fpga
Line: 130 to 130
 

ROC and CAL configuration files

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Configuration data for BUS0:
 
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* MDC configuration data: MDC configuration data: BUS0
 

Howto change ROC/CAL parameters via Etrax

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In the FPGA (Virtex) on the MDC Add-On the configuration data for BUS0 is stored in a RAM memory. If you want to change the configuration data, use the ./rw_mdc_addon program in "write mode" and set the device on number 5.
 
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i.e. If on the BUS0, 1 long MB is connected and you want to set the threshold to 43, use the following commands:

./rw_mdc_addon w 5 17D 43

./rw_mdc_addon w 5 17F 43

./rw_mdc_addon w 5 181 43

./rw_mdc_addon w 5 183 43

./rw_mdc_addon w 5 185 43

./rw_mdc_addon w 5 187 43

If you want to verify the value you wrote use the rw_mdc_addon program in "read mode":

./rw_mdc_addon r 5 17D

./rw_mdc_addon r 5 17F

./rw_mdc_addon r 5 181

./rw_mdc_addon r 5 183

./rw_mdc_addon r 5 185

./rw_mdc_addon r 5 187
 

Event size in Au+Au collision at 1GeV for one MDC chamber:

Line: 173 to 203
 

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META FILEATTACHMENT attr="" comment="my_addon board" date="1152519299" name="attilio_addonboard.pdf" path="attilio_addonboard.pdf" size="130258" user="AttilioTarantola" version="1.1"
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META FILEATTACHMENT attr="" comment="more about the addon board.." date="1152863913" name="presentazione_myboard.pdf" path="presentazione_myboard.pdf" size="300447" user="AttilioTarantola" version="1.1"
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Data structure

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MDC addonv1: Data structure

  -- AttilioTarantola - 28 Feb 2008

Here you find the structure of the data which is produced by the Add-On board. This data is transmitted to the TRB through the LVDS and TTL lines.
Line: 64 to 64
 
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
token status event type bus number (0..9) 0 0 0 0 Dataword number in the event
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The dataword which follows, has the following structure:
>
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The dataword structure will look like the following:
 

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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bus number (0..9) Motherboard number(1..3) TDC number (1..12) TDC Channel# 12-14:ch#(0..7), 11: hit#(0,1) Data
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Motherboard number(1..3) Bus number (0..15) TDC number (1..12) TDC Channel# 12-14:ch#(0..7), 11: hit#(0,1) Data

-- AttilioTarantola - 15 Mar 2008
  • few events: Data with the new data format. Calibration and TDC data sample. BUS 0 (or BUS A). Data coming from one short MB. I calibrate few channels per TDC.

How to start the MDC DAQ using Add-Onv1

-- AttilioTarantola - 15 Apr 2008

1. login in the ETRAX as ROOT.

2. program FPGA on TRB: ./TRBv2b_MDC.sh

3. set the environment: export DAQ_SETUP=pion9

4. programm the FPGA on Add-On: /home/hadaq/jamv2_addon -aRUN_XILINX_PROC /home/hadaq/Mdc_addon/plane_one/mdc_trb.stapl

5. enable calibration trigger: ./rw_mdc_addon w 0 0E 0

or disable calibration trigger: ./rw_mdc_addon w 0 0E 1

6. set how many MBs are connected to BUS 0:

(1 short MB): ./rw_mdc_addon w 0 7 1

(2 short MBs): ./rw_mdc_addon w 0 7 2

(1 long MB): ./rw_mdc_addon w 0 7 3

(3 long MBs): ./rw_mdc_addon w 0 7 4

7. reset: ./reset_fpga

8. begin run trigger: ./rwv2 w 0 6 80

9. start readout: ./readout_verbose -w 32000 -o UDP:192.168.0.1:30000

MDC End Point: Data structure

-- AttilioTarantola - 11 Mar 2008

From a meeting with Jan Michel (10.03.2008) in order to use the TRB net (End point) we should change the dataword structure. Here a first draft we might get as starting point for further discussions:

The Header is generated by the End Point. Here we have the address of the MB (unique, given by the temperature sensor).

The dataword (32 bits) might look like:
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
trigger type TDC number (1..12) TDC Channel# Data (Hit 1) Data (Hit 0)

As one can see, we use one 32 bits dataword for both hits (0 and 1). In each dataword we can set the trigger type (calibration, normal,..).

The event is terminated with a 32 bits dataword which contains error bits (token back or not..), number of dataword in the event,the trigger tipe and additional statistics...
 
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The final dataword structure will look like the following
 
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25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Motherboard number(1..3) Bus number (0..15) TDC number (1..12) TDC Channel# 12-14:ch#(0..7), 11: hit#(0,1) Data
 

State Machine description

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MDC-AddOn board documentation

 

Task

We should connect 16 motherboards to the add_on card to read out one Mdc sector.
Line: 26 to 26
 

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Rossendorf Dec07 discussion

-- BurkhardKolb - 14 Dec 2007

In Rossendorf we had a discussion about the MDC readout project. The RossendorfDec07Minutes can be found here.
 

Addon board design ideas

In this picture the transceiver used are (sn75976A).
Line: 48 to 54
 

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Data structure

-- AttilioTarantola - 28 Feb 2008

Here you find the structure of the data which is produced by the Add-On board. This data is transmitted to the TRB through the LVDS and TTL lines. The data bus is 26 bits width. In the first dataword I encode debug information: token back or not, bus number, event type (normal event or calibration event) and number of dataword in the event:

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
token status event type bus number (0..9) 0 0 0 0 Dataword number in the event

The dataword which follows, has the following structure:

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
bus number (0..9) Motherboard number(1..3) TDC number (1..12) TDC Channel# 12-14:ch#(0..7), 11: hit#(0,1) Data

The final dataword structure will look like the following

25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Motherboard number(1..3) Bus number (0..15) TDC number (1..12) TDC Channel# 12-14:ch#(0..7), 11: hit#(0,1) Data

State Machine description

State Machine registers

ROC and CAL configuration files

Howto change ROC/CAL parameters via Etrax

 

Event size in Au+Au collision at 1GeV for one MDC chamber:

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Cooperation with Yanyu Wang for the new MDC-driver cards

 
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Task

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Task

 

We should connect 16 motherboards to the add_on card to read out one Mdc sector. Each transceiver (sn75976A) has 20 pins (9 channels). We have two transceivers for each motherboard and we want to read out 10 buses.
Line: 18 to 18
 
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Transceiver discussion

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Transceiver discussion

 

-- AttilioTarantola - 11 Aug 2006
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Addon board design ideas

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Addon board design ideas

 

In this picture the transceiver used are (sn75976A).
Line: 36 to 36
 
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What the Virtex in the addon board has to do:

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What the Virtex in the addon board has to do:

 

-- AttilioTarantola - 27 Sep 2006
Line: 49 to 49
 
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Event size in Au+Au collision at 1GeV for one MDC chamber:

>
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Event size in Au+Au collision at 1GeV for one MDC chamber:

 

Event size in Au + Au collision at 1GeV (J.Wustenfeld diplomarbeit)
Line: 63 to 63
  The FIFO (EVENT COLLECTOR),in the block diagram, has to take 5 Kbits, corresponding to the event of 20 particles firing.

Suppose LVL1: 10^5 reactions/sec (or one LVL1 each 10 μsec ) and between the LVL1 and the LVL2 there are 150 μsec,
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I have to be able to store 15 events in the FIFO(event collector) for example. Approximately its size should be: 15 (events) X 5 (Kbits each) = 75 Kbits
>
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I have to be able to store 15 events in the FIFO(event collector) for example. Approximately its size should be: 15 (events) X 5 (Kbits each) = 75 Kbits.

  • Some "realisitic" estimation by C.Muentz: 7 wires per hit, add 10% noise -> equivalent to 8 wires per hit ("realistic estimate" from Ar+KCl). According to RQMD (M.Heilmann) the first plane is hit by 220 charged particels (central Au+Au at 1.5GeV) -> 37 hits per sector. Result: 37 x 8 x 2 = 568 datawords. This corresponds to 11.9 Kbits per event and chamber. Consequently, the FIFO size has to be (15 events stored): 180 Kbits.
 

I may suppose to transfer from my board to the TRB at this rate: 10^5 Hz x 5 Kbits = 500 Mbits/s
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  • According to RQMD (M.Heilmann), central Au + Au at 1.5GeV:
PLANE I -> 220 charged particels -> 37 hits per sector -> 568 datawords -> 11.9 Kbits per event and chamber

PLANE II -> 190 charged particels -> as plane I

PLANE III -> -

PLANE IV -> 110 charged particels -> 18 hits per sector -> 288 datawords -> 5.5 Kbits per event and chamber
 

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-- AttilioTarantola - 10 Jul 2006
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Cooperation with Yan Yu for the new MDC-driver cards

 
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We should connect 16 motherboards to the add_on card to read out one Mdc sector. Each transceiver (sn75976A) has 20 pins. We have two transceivers for each motherboard so 40 outputs differential pins for each motherboard. So, the addon board receives as input signals about 400 channels. It converts again the differential signal into TTL signals. The FPGA receives Mdc information, process this data (LVL2 algorithm...) and sends this data to the TRB v2 through a 20 pins connectors (QTE-020-02-F-D-A). Possibles FPGA from XILINX with transceiver channels are: XC4VFX20, XC4VFX40, XC4VFX60 XC4VFX100.
 
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Task

We should connect 16 motherboards to the add_on card to read out one Mdc sector. Each transceiver (sn75976A) has 20 pins (9 channels). We have two transceivers for each motherboard and we want to read out 10 buses. So, the addon board receives as input signals about 180 data lines. It converts again the differential signal into TTL signals. The FPGA (VIRTEX from XILINX) receives Mdc information, process this data (LVL2 algorithm...) and sends this data to the TRB v2 through a 2 X 20 pins connectors (QTE-020-02-F-D-A).
 
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Addon board design tips

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Addon board design ideas

 

In this picture the transceiver used are (sn75976A).
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What the Virtex in the addon board has to do:

Line: 66 to 67
 

I may suppose to transfer from my board to the TRB at this rate: 10^5 Hz x 5 Kbits = 500 Mbits/s
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(100 Mbits/s if each particle fires two TDC channels)
 
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META TOPICMOVED by="MichaelTraxler" date="1152694431" from="DaqSlowControl.Integration-adaptionOfTheMDC-read-outMotherboardsToTRBV2" to="DaqSlowControl.DaqUpgradeMDCOverview"
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-- AttilioTarantola - 10 Jul 2006
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We should connect 10 motherboards to the add_on card to read out one Mdc sector.
>
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We should connect 16 motherboards to the add_on card to read out one Mdc sector.
  Each transceiver (sn75976A) has 20 pins. We have two transceivers for each motherboard so 40 outputs differential pins for each motherboard. So, the addon board receives as input signals about 400 channels. It converts again the differential signal into TTL signals. The FPGA receives Mdc information, process this data (LVL2 algorithm...) and sends this data to the TRB v2 through a 20 pins connectors (QTE-020-02-F-D-A). Possibles FPGA from XILINX with transceiver channels are: XC4VFX20, XC4VFX40, XC4VFX60 XC4VFX100.
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These the main ideas. Please if you have comments tell me!
 
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Transceiver discussion

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What the Virtex in the addon board has to do:

-- AttilioTarantola - 27 Sep 2006

In this document a block diagram shows the main ideas to collect data from 16 motherboards as fast as possible.

Here the state machines I want to implement in my VHDL.

Event size in Au+Au collision at 1GeV for one MDC chamber:

Event size in Au + Au collision at 1GeV (J.Wustenfeld diplomarbeit)

20 particles for each chamber (6 layers), he supposes 20 channels fire

20(particles) X 6 (layers) X 2 (hits: l/t edges) = 240 datawords for all chains (16 motherboards) (here just estimation since it is possible that one particle let fire more than one TDC channel)

240(datawords) X 21 bits each = 5 Kbits

The FIFO (EVENT COLLECTOR),in the block diagram, has to take 5 Kbits, corresponding to the event of 20 particles firing.

Suppose LVL1: 10^5 reactions/sec (or one LVL1 each 10 μsec ) and between the LVL1 and the LVL2 there are 150 μsec, I have to be able to store 15 events in the FIFO(event collector) for example. Approximately its size should be: 15 (events) X 5 (Kbits each) = 75 Kbits

I may suppose to transfer from my board to the TRB at this rate: 10^5 Hz x 5 Kbits = 500 Mbits/s (100 Mbits/s if each particle fires two TDC channels)
 
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META TOPICMOVED by="MichaelTraxler" date="1152694431" from="DaqSlowControl.Integration-adaptionOfTheMDC-read-outMotherboardsToTRBV2" to="DaqSlowControl.DaqUpgradeMDCOverview"
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-- AttilioTarantola - 10 Jul 2006
  We should connect 10 motherboards to the add_on card to read out one Mdc sector. Each transceiver (sn75976A) has 20 pins. We have two transceivers for each motherboard so 40 outputs differential pins for each motherboard. So, the addon board receives as input signals about 400 channels. It converts again the differential signal into TTL signals.
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  These the main ideas. Please if you have comments tell me!
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-- AttilioTarantola - 10 Jul 2006
 

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Transceiver discussion

-- AttilioTarantola - 11 Aug 2006

Here a document in which I compare the main characteristic of the transceivers we are thinking to use. I compare transceivers from Texas Instrument, Analog Devices and Intersil.

Addon board design tips

In this picture the transceiver used are (sn75976A).

 
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META FILEATTACHMENT attr="" comment="Michael's ideas for MDC readout" date="1152519427" name="MDC-setup.pdf" path="MDC-setup.pdf" size="286335" user="AttilioTarantola" version="1.1"
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META FILEATTACHMENT attr="" comment="more about the addon board.." date="1152863913" name="presentazione_myboard.pdf" path="presentazione_myboard.pdf" size="300447" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="tranceivers" date="1155291167" name="comparison_transceivers.pdf" path="comparison_transceivers.pdf" size="176524" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="QTE pins ideas" date="1155291547" name="pin_myboard.pdf" path="pin_myboard.pdf" size="37110" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="tips on design" date="1155292659" name="drowing_myboard.pdf" path="drowing_myboard.pdf" size="47886" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="version 2" date="1155292959" name="drowing_myboard_v2.pdf" path="drowing_myboard_v2.pdf" size="58021" user="AttilioTarantola" version="1.1"
META TOPICMOVED by="MichaelTraxler" date="1152694431" from="DaqSlowControl.Integration-adaptionOfTheMDC-read-outMotherboardsToTRBV2" to="DaqSlowControl.DaqUpgradeMDCOverview"
 
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