Difference: MDC-Optical_endpoint_History (1 vs. 6)

Revision 6
06 Jun 2008 - Main.AttilioTarantola
Line: 1 to 1
 
META TOPICPARENT name="MdcAddonCooperation"
I propose to use the following components:
Line: 141 to 141
 

Using the ECP2M20(embedded memory of 1200 Kbits), we shouldn't have problems concerning RAM space.
Deleted:
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Chip's temperatures

-- AttilioTarantola and Yanyu - 23 May 2008

In the attached document we record the temperature of the chips. The test's conditions are described in the document.

The Lattice-device utilization during the test is:

Ignore Preference Error(s):  True

Device utilization summary:

APIO               4/18           22% used

PIO               13/330           3% used

13/140           9% bonded

IOLOGIC            2/330          <1% used

SLICE            102/9612          1% used

EBR                2/66            3% used

PLL                2/2           100% used

PCS                1/1           100% used

Number of Signals: 403

Number of Connections: 891

Pin Constraint Summary:

13 out of 13 pins locked (100% locked).

 

Soft Errors in ECP2M

-- AttilioTarantola - 03 Jun 2008

* soft_error.pdf: Soft Error Detection(SED) Usage guide
Deleted:
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Level adapters: U1, U2, U3

-- AttilioTarantola and Yanyu - 23 May 2008

Introduction: the voltage translators U1, U2, U3 translate 5V<->3.3V. The stay in between the Lattice and the CLPD on the MB.

In the picture:

- yellow signal: clk (50 MHz) produced in the lattice. Input for U2 (pin 1), 2.6V.

- green signal: output for U2(pin 20), 4.2V

The time difference between the two signals is 3.1 ns. Enlarging the picture one can see the ground line stays 1V below the signal's minima (1,2)

* U2 I/O:
Scope

In the following pictures:

- yellow DRA: clk (50 MHz) produced in the lattice. Input for U3 (pin 9).

- green signal: output for U3 (pin 20).

* U3 I/O :
Scope

The time difference between the two signals is 1.8 ns

* U3 I/O:
Scope

Obs: we didn't observe strange behaviors of U1,U2,U3.

They are always pretty warm and the temperature changes as described in the previous document (it depends of the I/O in use). Even with fast signals (clk 50 MHz) the output is present and delayed by few ns.

In the real case the fastest signal which will pass through the level adapter will be DST (data strobe 1-10 MHz).
 
Deleted:
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META FILEATTACHMENT attr="" comment="chip temperature" date="1211574744" name="chip_temperature.pdf" path="chip_temperature.pdf" size="35960" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="level adapter I/O" date="1211575518" name="print_000.bmp" path="print_000.bmp" size="2359350" user="AttilioTarantola" version="1.1"
Revision 5
03 Jun 2008 - Main.AttilioTarantola
Line: 1 to 1
 
META TOPICPARENT name="MdcAddonCooperation"
I propose to use the following components:
Line: 180 to 180
 

Added:
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Soft Errors in ECP2M

-- AttilioTarantola - 03 Jun 2008

* soft_error.pdf: Soft Error Detection(SED) Usage guide
 

Level adapters: U1, U2, U3

-- AttilioTarantola and Yanyu - 23 May 2008
Line: 224 to 230
 

Added:
>
>
 
META FILEATTACHMENT attr="" comment="chip temperature" date="1211574744" name="chip_temperature.pdf" path="chip_temperature.pdf" size="35960" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="level adapter I/O" date="1211575518" name="print_000.bmp" path="print_000.bmp" size="2359350" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="U3 I/O" date="1211576233" name="print_001.bmp" path="print_001.bmp" size="2359350" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="U3 I/O" date="1211576315" name="print_002.bmp" path="print_002.bmp" size="2359350" user="AttilioTarantola" version="1.1"
Added:
>
>
META FILEATTACHMENT attr="" comment="Soft Error Detection (SED) Usage Guide" date="1212522859" name="soft_error.pdf" path="soft_error.pdf" size="205667" user="AttilioTarantola" version="1.1"
Revision 4
24 May 2008 - Main.AttilioTarantola
Line: 1 to 1
 
META TOPICPARENT name="MdcAddonCooperation"
I propose to use the following components:
Line: 146 to 146
 

In the attached document we record the temperature of the chips. The test's conditions are described in the document.
Added:
>
>
The Lattice-device utilization during the test is:

Ignore Preference Error(s):  True

Device utilization summary:

APIO               4/18           22% used

PIO               13/330           3% used

13/140           9% bonded

IOLOGIC            2/330          <1% used

SLICE            102/9612          1% used

EBR                2/66            3% used

PLL                2/2           100% used

PCS                1/1           100% used

Number of Signals: 403

Number of Connections: 891

Pin Constraint Summary:

13 out of 13 pins locked (100% locked).
 

Level adapters: U1, U2, U3

Revision 3
23 May 2008 - Main.AttilioTarantola
Line: 1 to 1
 
META TOPICPARENT name="MdcAddonCooperation"
I propose to use the following components:
Line: 141 to 141
 

Using the ECP2M20(embedded memory of 1200 Kbits), we shouldn't have problems concerning RAM space.
Added:
>
>

Chip's temperatures

-- AttilioTarantola and Yanyu - 23 May 2008

In the attached document we record the temperature of the chips. The test's conditions are described in the document.

Level adapters: U1, U2, U3

-- AttilioTarantola and Yanyu - 23 May 2008

Introduction: the voltage translators U1, U2, U3 translate 5V<->3.3V. The stay in between the Lattice and the CLPD on the MB.

In the picture:

- yellow signal: clk (50 MHz) produced in the lattice. Input for U2 (pin 1), 2.6V.

- green signal: output for U2(pin 20), 4.2V

The time difference between the two signals is 3.1 ns. Enlarging the picture one can see the ground line stays 1V below the signal's minima (1,2)

* U2 I/O:
Scope

In the following pictures:

- yellow DRA: clk (50 MHz) produced in the lattice. Input for U3 (pin 9).

- green signal: output for U3 (pin 20).

* U3 I/O :
Scope

The time difference between the two signals is 1.8 ns

* U3 I/O:
Scope

Obs: we didn't observe strange behaviors of U1,U2,U3.

They are always pretty warm and the temperature changes as described in the previous document (it depends of the I/O in use). Even with fast signals (clk 50 MHz) the output is present and delayed by few ns.

In the real case the fastest signal which will pass through the level adapter will be DST (data strobe 1-10 MHz).

META FILEATTACHMENT attr="" comment="chip temperature" date="1211574744" name="chip_temperature.pdf" path="chip_temperature.pdf" size="35960" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="level adapter I/O" date="1211575518" name="print_000.bmp" path="print_000.bmp" size="2359350" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="U3 I/O" date="1211576233" name="print_001.bmp" path="print_001.bmp" size="2359350" user="AttilioTarantola" version="1.1"
META FILEATTACHMENT attr="" comment="U3 I/O" date="1211576315" name="print_002.bmp" path="print_002.bmp" size="2359350" user="AttilioTarantola" version="1.1"
Revision 2
21 May 2008 - Main.AttilioTarantola
Line: 1 to 1
 
META TOPICPARENT name="MdcAddonCooperation"
I propose to use the following components:
Line: 100 to 100
 

Yanyu 2007.03.16
Added:
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-- MichaelTraxler - 19 May 2008
 

ECP2M20E Lattice FPGA

Added:
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-- AttilioTarantola - 21 May 2008
 
Added:
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Main goal: the vhdl design already implemented on the MDC-addonv1 will run (compiled and simulation in progress) in the ECP2M. In addition the VHDL-code with the TRB-Net-protocol, for data transmission will be used.
 
Changed:
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-- MichaelTraxler - 19 May 2008
>
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In a meeting with Vladimir P., I got it might be useful if the MDC Optical end-point could perform the following operation:

- calculate t1-t2 (time cut), which might be done without calibrated data.

- mapping the TDC channel and number with the corresponding wire information, which can be stored in the ECP2M RAM. For each dataword, the ECP2M might generate a second dataword containing the following "mapped information": SECTORS, MODULE, LAYER, CELL. In this way we could generate/prepare the data for the future tracking software.

SECTORS = 3 bits

MODULE = 3 bits

LAYER = 3 bits

CELL = 8 bits

We need to store in the RAM (17 bits x 8 channel x 12 TDCs) = 1632 bits.

The wire information stored in the RAM should be accessible and one should have the possibility to change these parameters.

For the configuration and the readout of 1 BUS the MDC-addonv1 uses 7 RAMs (RAMB16_S18_S18, 16384 bits each) This means 16384 bits x 7 RAMs = 114688 bits

Conclusion: the information we should store in each ECP2M is:

115 Kbits(readout and configuration for one MB) + 1.6 Kbits = 116.6 Kbits

Using the ECP2M20(embedded memory of 1200 Kbits), we shouldn't have problems concerning RAM space.
 
 
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