Difference: TrbAddOnErrors (1 vs. 6)

Revision 6
10 Feb 2010 - Main.JanMichel
Line: 1 to 1
 
META TOPICPARENT name="TRBBoardErrors"

Errors found in the MDC-Optical-AddOn1 design

Line: 28 to 28
 

Errors found in the Shower AddOn2 design

  • SDIO port of ADC is connected to LVTTL bank - should be LVCMOS25 or lower due to 1.79V U_h_out of ADC
  • D* LED are connected to wrong supply voltage (3.3V, but connected to 2.5V bank)
Added:
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>
  • H_FEB_ODD, H_FEB_ENABLE and H_FEB_EVEN are switched in polarity
 
Revision 5
06 Feb 2010 - Main.JanMichel
Line: 1 to 1
 
META TOPICPARENT name="TRBBoardErrors"

Errors found in the MDC-Optical-AddOn1 design

Line: 22 to 22
 
  • Equip CMLOSC03 with 531KA100 - 100 MHz CML oscillator
  • Equip CMLOSC02 with 531KA125 - 125 MHz CML oscillator
  • Temperature Sensor patch: Connect Temperature Sensor to FPGA1: FPGA-pin H1(lower left pin with testpad) to Pin 80 of AddOn-Connector JTRB2. (see TrbPatches)
Changed:
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  • Disconnect ADO_TTL_46 from AddOn-Connector. This pin is now used as Onewire-Transport between both fpga
>
>
  • Disconnect ADO_TTL_46 from AddOn-Connector. This pin is now used as Onewire-Transport between both fpga

Errors found in the Shower AddOn2 design

  • SDIO port of ADC is connected to LVTTL bank - should be LVCMOS25 or lower due to 1.79V U_h_out of ADC
  • D* LED are connected to wrong supply voltage (3.3V, but connected to 2.5V bank)
 
Revision 4
27 Oct 2009 - Main.JanMichel
Line: 1 to 1
Changed:
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<
META TOPICPARENT name="TDCReadoutBoardV2"
>
>
META TOPICPARENT name="TRBBoardErrors"
 

Errors found in the MDC-Optical-AddOn1 design

  1. The silk-screen (text on the PCB) of the LEDs are not corresponding to the FOT number. So, e.g. FOT13 has a LED with the text RX5 or so.
Revision 3
03 Aug 2009 - Main.JanMichel
Line: 1 to 1
 
META TOPICPARENT name="TDCReadoutBoardV2"

Errors found in the MDC-Optical-AddOn1 design

Line: 13 to 13
 
  1. FPGA1 has no dedicated reset signal from Power Manager
  2. FPGA2 / Serdes LLC0 (TX/RX1): RX and TX are mixed up!
  3. SFP are missing pull-resistors
Added:
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>
  1. VCCAUX33 for FPGA3 is wrongly connected to 1.2V, but should be connected to 3.3V. Patch: Tilt up L18 (right side up, left side soldered to the "plane for FPGA") and connect a wire from this open pin to L14 (right side, 3,3V).
 

Errors found in the Hub2-AddOn design

Deleted:
<
<
  • VCCAUX33 for FPGA3 is wrongly connected to 1.2V, but should be connected to 3.3V. Patch: Tilt up L18 (right side up, left side soldered to the "plane for FPGA") and connect a wire from this open pin to L14 (right side, 3,3V).
 
  • Equip CMLOSC03 with 531KA100 - 100 MHz CML oscillator
  • Equip CMLOSC02 with 531KA125 - 125 MHz CML oscillator
  • Temperature Sensor patch: Connect Temperature Sensor to FPGA1: FPGA-pin H1(lower left pin with testpad) to Pin 80 of AddOn-Connector JTRB2. (see TrbPatches)
Revision 2
03 Aug 2009 - Main.MichaelTraxler
Line: 1 to 1
 
META TOPICPARENT name="TDCReadoutBoardV2"

Errors found in the MDC-Optical-AddOn1 design

Line: 17 to 17
 

Errors found in the Hub2-AddOn design

Added:
>
>
  • VCCAUX33 for FPGA3 is wrongly connected to 1.2V, but should be connected to 3.3V. Patch: Tilt up L18 (right side up, left side soldered to the "plane for FPGA") and connect a wire from this open pin to L14 (right side, 3,3V).
 
  • Equip CMLOSC03 with 531KA100 - 100 MHz CML oscillator
  • Equip CMLOSC02 with 531KA125 - 125 MHz CML oscillator
  • Temperature Sensor patch: Connect Temperature Sensor to FPGA1: FPGA-pin H1(lower left pin with testpad) to Pin 80 of AddOn-Connector JTRB2. (see TrbPatches)
 
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