-- RadekTrebacz - 23 Oct 2006

Assembler code: I/O test

-The original file with headers is in hadaq@hadeb05:~/soft/devboard-fs_32v2/os/linux-2.6/arch/cris/arch-v32/attilio>

-Name file: wr.S

-This code is written for SPU. The steps are: enable bus0, map bus0 to port PB, set output enable for bus0, set bus ouput

- I compile with the command line: iopasm --arch SPU --output-format binary -o wr.spu.bin wr.S


#define ASSEMBLER_MACROS_ONLY

#define reg_iop_sw_spu_rw_bus0_oe_mask_offset 0x0000

spu0_start:

;set enable for bus0--> BUS [7,0]

rwq 0xffff, REG_ADDR(iop_sw_spu, iop_sw_spu0, rw_bus0_oe_mask)

;Mapping of bus0[7:0].a: Mapping a, port PB[7:0] is selected a=1

rwq 0x1, REG_ADDR_VECT_X_(iop_sw_cfg, 0x1, 0x1, 0x1) ;REG_ADDR_VECT_X_( inst, offs, index, stride ) if I use the standard macro REG_ADDR VECT I get error becouse stride not defined!!!!!??

;set output enable for all 32 bit of the bus0

rwq 0x0, REG_ADDR(iop_sw_spu, iop_sw_spu0, rw_bus0_set_mask_lo)

rwq 0x0, REG_ADDR(iop_sw_spu, iop_sw_spu0, rw_bus0_set_mask_hi)

;BOUT is SPU special register. set initial value in the bus0

moveq 0xffff, B0OUT

halt

.end

Code sources

Code for SPU inhabits in:
hadaq@hadeb05:~/soft/devboard-fs_32v2/os/linux-2.6/firmware/write.spu.S
for MPU
hadaq@hadeb05:~/soft/devboard-fs_32v2/os/linux-2.6/firmware/1.mpu.S
Device Driver Code:
hadaq@hadeb05:~/soft/devboard-fs_32v2/os/linux-2.6/drivers/iop/
To put a new version of device driver to the NFS directory type:
make nfs in the directory
~/soft/devboard-fs_32v2/os/linux-2.6/drivers/iop/cris-2.6-R1_02
To put a new version of firmware [1.mpu.bin and write.spu.bin] to NFS directory type:
make clean && make nfs in the directory
~/soft/devboard-fs_32v2/os/linux-2.6/firmware
To load a firmware to IOP memory by device driver type:
cd /home/hadaq && insmod ./crisv32-usb-hcd.ko mpu_fw="1.mpu.bin" spu_fw="write.spu.bin"

TIPS:

TIP ownership could be changed in:
hadaq@hadeb05:~/soft/devboard-fs_32v2/os/linux-2.6/drivers/iop/common-R1_00/iop-usb.c in function: iop_usb_config
ALERT! between the lines:
rwq REG_STATE (iop_sw_spu, rw_mc_ctrl, keep_owner, no) | \
      REG_STATE (iop_sw_spu, rw_mc_ctrl, cmd, wr) | \
      REG_FIELD (iop_sw_spu, rw_mc_ctrl, size, 0x4) | \
      REG_STATE (iop_sw_spu, rw_mc_ctrl, wr_spu0_mem, no) | \
      REG_STATE (iop_sw_spu, rw_mc_ctrl, wr_spu1_mem, no), \
      REG_ADDR (iop_sw_spu, iop_sw_spu0, rw_mc_ctrl)

rr REG_ADDR(iop_sw_spu, iop_sw_spu0, r_mc_stat), r15
has to be nop. In the other case I got Segmentation fault

Up to now:

MPU
- all threads are idle and running - They have to run in order to work SPU in the correct way. Why ? - dont ask me
SPU
- Select SPU is done by variable IPO_USB_DMAMAPPING
- read/write external memory [SDRAM]
- use FSM
- read status FIFO out / put data to FIFO out
- read status FIFO in
HELP I dont see any data in FIFO in(I read status FIFO in), after I put some data in FIFO out [problem with connection FIFO out/in ?]
- change ownership for define module
HELP I dont know why so many nop operation should be put in the code

Dataflow

Current state

We are trying to connect PortC and IOP via BUS1[portC->SAP->CRC->FIFO->DMC]: we see data in the FIFO
Topic attachments
I Attachment Action Size Date Who Comment
datapath.epseps datapath.eps manage 12.2 K 27 Nov 2006 - 16:24 RadekTrebacz Data flow in the IOP
Topic revision: r13 - 01 Jan 2010, JanMichel
 
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