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CodeRepositoriesCVS
CVS Basics Here are some most often used CVS commands. After you got your local copy of a module, all the CVS commands related to the module you should do insi...
CommonStatusRegister
Common Status Register All network devices have one (or more) 32 Bit status registers. These registers will be read out for example once each second using TRBNet....
DAQUpgradeInstallation
DAQ Upgrade Installation of TRB, AddOn, Network... Trigger Distribution * RPC: One PECL LVDS converter on each sector * Shower: Same distributor board a...
DaqMeetingAgendaJuly2009
Agenda for the DAQ Electronics Integration Meeting data format for the different subsystems * news since the Sesimbra meeting (Michael B., Attilio, Marcin?, M...
DaqNetwork
The DAQ Network Concept Overview $ NewTriggerBusConcept : The concept for a new trigger bus DAQ Network Modules $ NewTriggerBusCom : The hadcom module ...
DaqTodoList
Short term To Do List DAQ Documentation Prio. Topic Status Person 5 In depth documentation of CTS settings behaviour not started ...
DaqUpgradeGbE
Main.GrzegorzKorcyl 06 May 2009 Overview: Optical hub is an TRBv2 addon board which extends the main board with routing and communication features. The power of ...
DaqUpgradeOverview
DAQ Upgrade This document gives an overview of why and how we want to upgrade our HADES DAQ/Trigger System. The upgrade at a glance : ) . Motivation for an Upgr...
DaqUpgradeSubEventDebugBlock
Structure The main idea is to include additional debug information inside the data block (either send by TRBNet or on the classical way). This information should ...
DataStructure
Main.AttilioTarantola 03 May 2009 Here follows the new data structure for MDC readout(OEPB). In the following picture (taken from Jan's talk, IKF Seminar 30.04.0...
DescriptionOfFPGA
A VIRTEX4 LX40 FPGA is used on the TRBv2. FPGA registers r/w adress bits r 0 31 26 not used ADO_LV 25 0 r 1 31 lvl2 busy 30:lvl1_fif...
EtraxTRBInterface
Interface between Etrax and FPGA on TRB ("TrbNet edition") Interface The interface between Etrax and FPGA on the TRB2 uses 2 data ports (Port B and C) of the Etr...
EventBuilder
GeneralInformation general information about event builder machines, services running on those machines and so on. EventBuilderDevelopment information and docum...
EventBuilder2012
Status of eventbuilder for beamtime 2012 Here documentation of setup and changes Eventbuilder machines Hardware lxhadesdaq central machine lxhadeb01 Previous ...
EventBuilderDabc
Eventbuilder and TRBnet plugin for DABC Introduction The future application for trbnet hardware for FAIR detector test beams (e.g. CBM, PANDA, R3B) requires to i...
HowStartDAQ
"Nice" version of DAQ System: List of files needed for starting DAQ on TRB: You have to log into the board and program FPGA: /home/hadaq/FPGA_jam_stapl.sh Log ...
MDC-Optical_endpoint_History
I propose to use the following components: * SPFEIM100_G optical transceiver from Infineon (I ordered 30 of them 2007 01 29 ) * a 100 300Mbits/s SERDES. In...
MdcAddonCooperation
MDC Upgrade: Cooperation with Yanyu Wang Introduction In the HADES DAQ Upgrade project the MDC Upgrade is an essential part. The expected data rates for heavy ...
MdcReadoutupgrademeeting
Weekly meeting on MDC readout upgrade Main.BurkhardKolb 08 Sep 2009 Participants: Main.BurkhardKolb, Main.JanMichel, Main.JoernWuestenfeld, Main.KathrinGoeb...
NetworkAddresses
TRBNet Addresses Here are some suggestions for TrbNet Addresses in the final detector setup. They were choosen based on the following premises: * The addresses...
NewCTS
CTS and Trigger Logic addresses To all register when accessing vi trbnet add offset A0 CTS Address Bit range Meaning 91 15 downto 0 lvl1 trigger number...
NewTriggerBusApplicationNotes
Howto implement to OLD_TO_NEW converter The OLD_TO_NEW converter has the old trigger bus as an input, configured in "DTU mode". On the DaqNetwork it has to emulat...
NewTriggerBusToDo
Not the official milestones, but some pragmatic steps: Simulations VHDL simulation done by Ingo. First important step is to have a running chain with 2 dummy APL...
OEPNetworkAddresses
Network Addresses of MDC Motherboards/OEPs According to NetworkAddresses, all OEP get TrbNet addresses in the range between 0x2000 to 0x2FFF. The second hex digit...
OepToDoList
Important things that are necesarry for beamtime 1 Timing issues (initialization phase of MBO) 1 Rotating masks for calibration 1 Trigger interface ( ...
ProposalAndFeaturesTRB3
Layout Proposal (obsolete): * TRB3_layout_proposal1.pdf: Layout proposal * TRB3 updated layout: Key Features * 4 times LFE3 70E(A) 8FN672C for TDC...
RichFEEandDAQUpgrade
First light : ) Despite the fact the the description below is really outdated, I can pronounce the first really important step from connecting the new RICH ADCM t...
RossendorfDec07Minutes
Main.BurkhardKolb 14 Dec 2007 Agenda: 11.12.07 introduction Attilios Talk about MDC readout via TRB identified projects: TRB Add on board old driver cards ...
SPIFlashProgramming
SPI controller description The SPI FlashROM controller is attached to RegIO data bus. The user interface consists of two 32bit registers, and one BlockRAM for dat...
SoftTools
Unpacking, hld unpack_hld.pl The script unpacks the hld file (taking into account big/little endian byte ordering) and stores the output in the array. User can u...
TDCReadoutBoardV2
TRBv2 How To * TRBv2 HowTo Errors found in previous design versions * Things we learned from ETRAX_FS_DEV1 * Errors in TRBv2A * Errors in TRBv2B *...
TRBPublicationList
TRB Publication List Here we should collect all available presentations/talks/papers Please also put all information about location and date. 2006 * TRBv2_Sc...
TRBSourceList
Source codes for etrax fs on hadeb05.gsi.de: binary file description ...
TrbNetAddresses
Network Addresses Each network member needs an unique 16Bit address. A network member is not necessarily equal to some piece of hardware: A normal TRB2 board has ...
TrbNetConfiguration
Network configuration A lot of parameters cn be set using the generics in each top entity. Nevertheless, some of these have to be common for all network devices. ...
TrbNetDatafields
Common definitions for the use of TRBNets datafields Packet types The packet type is sent with each 64 bit packet Name Type Description F1 F2 F3 ...
TrbNetEntities
Overview The "normal" TrbNetEndPoint consists of up to 16 TrbNetIOBUF. Special endpoints for dedicated reasons have only a subset of TrbNetIOBUF in order to keep ...
TrbNetFiles
TRBNet Files This is a list of files found in the cvs. The optical link is missing at the moment. Low level parts Fifos $ trb_net_fifo: A standard fifo entit...
TrbNetIBUF
Overview The TrbNetIBUF is buffering the data coming from the media. All word which are offered by the media must be read, otherwise something is completly wrong ...
TrbNetMediaInterfaces
Media Interfaces For every kind of network medium we need an dedicated media interface. For example there is an lvds interface (200MBit), an optical link interfac...
TrbNetMonitoring
Main.BorislavMilanovic 27 Jul 2009 TRBnet Monitoring System On this page, the new monitoring facility for the TrbNet will be presented. Any user may feel free to...
TrbNetOnewire
Trb Net Onewire interface This entity provides a very simple 1 wire master to read out the id of a 1 wire device. It does not support busses with more than one de...
TrbNetRegIO
Reading and Writing registers over the network TrbNetRegIO is a simple interface to read and write registers inside your application from anywhere on the network....
TrbNetStreamedEventBuilding
Streamed Event Building The name "streamed event building" comes from the fact that inside the network there is no place where we can guarantee to be able to stor...
TrbNetStreamingAPI
Trbnet Streaming API A streaming API allows an application to be inserted into the data stream. There it can fullfill two different tasks: It can simply preproces...
TrbNetUsersGuide
Overview $ trbnet_full_endpoint.pdf : The hades_full_endpoint entity is the central part to connect to the network. Overview Short description of the ports ...
TrbV2ConnectorsPinout
Connector A (JADDON1) With these connectors (JADDON1 and JADDON2) the Add on board communicates with the TRBv2 board: it receives trigger information and basicall...
TriggerLvl1Information
LVL1 Trigger Definitions * All information about LVL1 triggers will be sent in a packet using TrbNet and the optical network. * A fast trigger strobe for ...
VHDLCodeStyle
Hardware programming guidelines * Synchronous design * synchronization of external signals (at very high frequencies use two register) * never...
VHDLConstraints
Information on using VHDL Constraints Lattice constraints Constraints for Lattice FPGAs should be located in a separate LPF file, especially if these constraints...
WebHome
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