Common definitions for the use of TRBNets datafields

Packet types

The packet type is sent with each 64 bit packet

Name Type Description F1 F2 F3
DAT 0x0 Normal data word Data
HDR 0x1 Transfer start / source changed Source adress Target adress SEQNR / DTYPE
EOB 0x2 End of Buffer   Data count Checksum
TRM 0x3 Transfer Terminated Error pattern SEQNR / DTYPE
EXT 0x4 Extended data word special data word for error detection
ACK 0x5 Buffer acknowledge res. Length of buffer res.
SIG 0x6 Signals future option
ILL 0x7 Illegal word - ignore Data

-- Oct 2008: The packet size is going to be changed to 80 bit for better compatibility with 32 bit data words.

Name TypeSorted ascending Description H0 F0 F1 F2 F3
DAT 0x0 Normal data word   Data Data Data Data
HDR 0x1 Transfer start / source changed   Source adress Target adress   SEQNR / DTYPE
EOB 0x2 End of Buffer   Checksum   Data count Buffer number
TRM 0x3 Transfer Terminated   Checksum Error pattern Error pattern SEQNR / DTYPE
EXT 0x4 Extended data word   special data word for error detection
ACK 0x5 Buffer acknowledge     Length of buffer   Buffer number
SIG 0x6 Signals   future option
ILL 0x7 Illegal word - ignore   invalid invalid invalid invalid

EXT and SIG are not implemented yet. EXT can for example be used for a CRC.

H0 is the packet start word: Bit 2-0: Packet type, Bit 3: init/reply channel, Bit 5-4: channel.

Data types

The datatype is a four bit value called dtype that is sent in each header and termination to specify the kind of data that is transfered. The definition for each datatype varies from channel to channel, the free usable values can also be selected for each endpoint seperatly.

Data Type TRG1 IPU Data Slow Control
0 trigger type tbd not used
1 " tbd not used
2 " tbd not used
3 " tbd not used
4 " tbd not used
5 " tbd not used
6 " tbd not used
7 " tbd not used
8 tbd tbd register read access
9 tbd tbd register write access
A tbd tbd memory read access
B tbd tbd memory write access
C tbd tbd res.
D tbd tbd res.
E tbd tbd res.
F tbd tbd network administration

The protocol for register and memory access on the slow control channel is defined in TrbNetRegIO. The network administration type is used for address assignment as described in TrbNetAddresses.

Broadcast Addresses

The network uses 9 different broadcast address for groups of network nodes. These are all addresses in the range above 0xFF00. The groups are selected by the BROADCAST_BITMASK generic in the top-level trbnet entity. Here, a negative logic is used, that means a '0' in the bitmask adds the board to the group given below.

Unset Bit Bitmask Broadcast Address Type
- FF FFFF all boards
0 FE FFFE Hubs
1 FD FFFD MDC OEPB
2 FB FFFB RICH ADCM
3 F7 FFF7 Shower AddOn
4 EF FFEF TRB using TDC
5 DF FFDF Ethernet-related
6 BF FFBF  
7 7F FF7F  

A Board can belong to more than one group by unsetting more than one bit in its configuration bitmask.

Error bits

The errorbits are 32 Bit data that are sent in each termination packet. For init transfers these are simply transported along with all other data. On the reply channel, the errorbits from all endpoints are merged using a or-logic.

Thus, for reply transfers these bits must be defined for all network members and should be 0 on normal operation.

The values for init transfers should not be hardcoded in any endpoint but constants defined in Trb_net_std should be used.

The lower 16 bit are flags common to all channels, while the upper 16 bit are channel dependend.

Common Error bits

Bit Short Name Description Set by entity
0 endpoint reached The addressed endpoint has be reached. API
1 collision detected A collision occured while sending the data. It is lost. HUB
2 word missing mismatch between packet counter and received number of packets IBUF
3 checksum error mismatch of given checksum with calculated one IBUF
4 dont understand addressed endpoint doesn't know how to treat received data APL
5 buffer mismatch received and internal buffer numbers do not match IBUF
6 answer missing One endpoint did not react Hub
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LVL1 trigger channel Errorbits

Bit Short Name Description Set by entity
16 trigger counter mismatch Trigger number received does not match internal counter value ENDP
17 timing trigger missing lvl1 trigger packet without timing trigger ENDP
18      
19      
20 buffers half full data buffers are filled to more than one half APL
21 buffers almost full data buffers are almost full APL
22 not configured FEE has not been configured correctly APL
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Data readout / IPU channel Errorbits

Bit Short Name Description Set by entity
16 trigger number mismatch Trigger number received does not match internal counter value Hub
17 trigger code / random mismatch Mismatch in second 16bit word of DHDR Hub
18 wrong length Length submitted in HDR does not match real length Hub
19 answer missing a board sent a short transfer instead of DHDR Hub
20      
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24 not found sent trigger number does not match stored events APL
25 partially not found parts of the data are missing APL
26 severe problem serious sync problem detected - intervention needed APL
27 single broken event event data corrupted, next event most likely not affected APL
28      
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31      

Slow control channel Errorbits

Bit Short Name Description Set by entity
16 unknown address No register / action is assigned to this address RegIO
17 timeout Application didn't react within given time limit RegIO
18 nomoredata Transfer was stopped with no more data signal RegIO
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Topic revision: r23 - 08 Oct 2009, JanMichel
 
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