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CVS Basics Here are some most often used CVS commands. After you got your local copy of a module, all the CVS commands related to the module you should do insi...
DAQ Upgrade Installation of TRB, AddOn, Network... Trigger Distribution * RPC: One PECL LVDS converter on each sector * Shower: Same distributor board a...
Open Tasks Tasks currently on our agenda: * Remove obsolete cables still a topic ; ) (Everybody who is familiar with the old setup) * Install temperature...
Some electronics, DAQ and Detector related conferences we might want to have some contributions at. Date Description Deadline 23.06.13 27.06.13 Anim...
Interface between Etrax and FPGA on TRB ("TrbNet edition") Interface The interface between Etrax and FPGA on the TRB2 uses 2 data ports (Port B and C) of the Etr...
List of Boards This should be a complete list of all used boards in the HADES DAQ context. For the running system, such a list is needed to assign the network add...
Installation and Testing of new MDC DAQ components * OEPBasicTests Testing OEPs and first time programming in Lab * InformationForOEPMounting Bookkeepin...
Readout Setup v1 : AddOnv1 and other outdated information Rossendorf Dec07 discussion In Rossendorf we had a discussion about the MDC readout project. The Rossen...
MDC Upgrade the final phase Meetings The first meeting of this working period will take place on Monday, 4.1.2010 at 10 a.m. in the upper counting house. Plan...
TRBNet Addresses Here are some suggestions for TrbNet Addresses in the final detector setup. They were choosen based on the following premises: * The addresses...
Not the official milestones, but some pragmatic steps: Simulations VHDL simulation done by Ingo. First important step is to have a running chain with 2 dummy APL...
Network Addresses of MDC Motherboards/OEPs According to NetworkAddresses, all OEP get TrbNet addresses in the range between 0x2000 to 0x2FFF. The second hex digit...
List of outdated pages This entry will service as harbour for all outdated and obsolete topics in the DaqSlowControl Web. Contents Main.JanMichel 12 Dec 2009...
Add connection between temperature sensor and FPGA (additional to connection to Etrax) (Fix on Trbv2: wire from via next to Pin1 of temperature sensor to JP266 te...
All tables can be edited directly. Use the "Edit table" button underneath each table! Logs for all tests Here are some tables to collect all necessary data for a...
Network Addresses Each network member needs an unique 16Bit address. A network member is not necessarily equal to some piece of hardware: A normal TRB2 board has ...
Network configuration A lot of parameters cn be set using the generics in each top entity. Nevertheless, some of these have to be common for all network devices. ...
TRBNet Files This is a list of files found in the cvs. The optical link is missing at the moment. Low level parts Fifos $ trb_net_fifo: A standard fifo entit...
Media Interfaces For every kind of network medium we need an dedicated media interface. For example there is an lvds interface (200MBit), an optical link interfac...
Trb Net Onewire interface This entity provides a very simple 1 wire master to read out the id of a 1 wire device. It does not support busses with more than one de...
Reading and Writing registers over the network TrbNetRegIO is a simple interface to read and write registers inside your application from anywhere on the network....
Trbnet Streaming API A streaming API allows an application to be inserted into the data stream. There it can fullfill two different tasks: It can simply preproces...
AddOns The pictures shown are a sized down. Download the file from the table to see the high resolution version. Trb2 B Connect Temperature Sensor to FPGA: Via o...
LVL1 Trigger Definitions * All information about LVL1 triggers will be sent in a packet using TrbNet and the optical network. * A fast trigger strobe for ...
Information on using VHDL Constraints Lattice constraints Constraints for Lattice FPGAs should be located in a separate LPF file, especially if these constraints...
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