///~~ VULOM 3 PINOUT ~~\\\ NOTICE: Do *NOT* plug anything to Input(1÷8), I/O(9÷16), Lemo input(2). _________ | VULOM 3 | | ___ | | |___| | | | | - + | |---------| |---------| |16 . . I| UNUSED |15 . . N| UNUSED |14 . . P| TOF(6) INPUT |13 . . U| TOF(5) INPUT |12 . . T| TOF(4) INPUT |11 . . | TOF(3) INPUT |10 . . | TOF(2) INPUT | 9 . . | TOF(1) INPUT |---------| | 8 . . | UNUSED | 7 . . | UNUSED | 6 . . | MDC(1) | 5 . . I| MDC(2) | 4 . . N| MDC(3) | 3 . . P| MDC(4) | 2 . . U| MDC(5) | 1 . . T| MDC(6) |---------| |---------| |16 . . I| UNUSED |15 . . /| TRB BUS ACK -> now UNUSED !!! |14 . . O| TRB BUS RETRANSMIT -> now UNUSED !!! |13 . . | UNUSED |12 . . | HIGH VOLTAGE EXTERNAL INHIBIT PULSE OUTPUT |11 . . | TRB DATA (1) -> now MUX 2 OUT !!! |10 . . | TRB DATA (0) -> now MUX 1 OUT !!! | 9 . . | TRB TRANSMITION CLOCK -> now CALIBRATION out !!! |---------| | 8 . . | UNUSED | 7 . . | VETO SIGNAL INPUT | 6 . . | TIMING SIGNAL INPUT | 5 . . | PHYSIC TRIGGER 5 INPUT | 4 . . | PHYSIC TRIGGER 4 INPUT | 3 . . I| PHYSIC TRIGGER 3 INPUT | 2 . . /| PHYSIC TRIGGER 2 INPUT | 1 . . O| PHYSIC TRIGGER 1 INPUT |---------| |---------| |16 . . O| MUX 2 OUTPUT |15 . . U| VETO SIGNAL AFTER DOWNSCALE OUTPUT |14 . . T| TIMING SIGNAL AFTER DOWNSCALE OUTPUT |13 . . P| PHYSIC TRIGGER 5 AFTER DOWNSCALE OUTPUT |12 . . U| PHYSIC TRIGGER 4 AFTER DOWNSCALE OUTPUT |11 . . T| PHYSIC TRIGGER 3 AFTER DOWNSCALE OUTPUT |10 . . | PHYSIC TRIGGER 2 AFTER DOWNSCALE OUTPUT | 9 . . | PHYSIC TRIGGER 1 AFTER DOWNSCALE OUTPUT |---------| | 8 . . | MUX 1 OUTPUT | 7 . . | VETO SIGNAL BEFORE DOWNSCALE OUTPUT | 6 . . O| TIMING SIGNAL BEFORE DOWNSCALE OUTPUT | 5 . . U| PHYSIC TRIGGER 5 BEFORE DOWNSCALE OUTPUT | 4 . . T| PHYSIC TRIGGER 4 BEFORE DOWNSCALE OUTPUT | 3 . . P| PHYSIC TRIGGER 3 BEFORE DOWNSCALE OUTPUT | 2 . . U| PHYSIC TRIGGER 2 BEFORE DOWNSCALE OUTPUT | 1 . . T| PHYSIC TRIGGER 1 BEFORE DOWNSCALE OUTPUT |---------| |---------| | LEMO | | 1 2 | | | |I 0 0 | BUSY INPUT HIGH VOLTAGE BUSY INPUT |O 0 0 | GLOBAL TRIGGER OUTPUT VULOM BUSY |_________| Mux 1 selection (refer to Logic Diagram) 0 PTI1_DELAYED 1 PTI2_DELAYED 2 PTI3_DELAYED 3 PTI4_DELAYED 4 PTI5_DELAYED 5 TS_DELAYED 6 VS_DELAYED 7 PTI1_and_GTS 8 PTI2_and_GTS 9 PTI3_and_GTS 10 PTI4_and_GTS 11 PTI5_and_GTS 12 TS_READY 13 VS_READY 14 OR_out 15 GLOBAL_TIMING_SIGNAL_OUT Mux 2 selection 0 PTI1_DELAYED 1 PTI2_DELAYED 2 PTI3_DELAYED 3 PTI4_DELAYED 4 PTI5_DELAYED 5 TS_DELAYED 6 VS_DELAYED 7 tof_mux 8 TS_DELAYED and not VS_WIDTH_SET 9 tof_mult_2_width_out 10 VS_READY 11 mdc_tof_trigger_width_set 12 TS_READY 13 VS_READY 14 CLOCK_READY 15 mdc_mux