COMMERCIAL; BLOCK RESETPATHS; BLOCK ASYNCPATHS; ###################################################################### # Clock pins ###################################################################### # SerDes dedicated clock, not populated, not used! #LOCATE COMP "CLK100M_P" SITE "D19"; #IOBUF PORT "CLK100M_P" IO_TYPE=LVDS25; # 40MHz APV clock, is now 100MHz #LOCATE COMP "CLK40M" SITE "U20" ; LOCATE COMP "CLK40M" SITE "AF12" ; #patched board IOBUF PORT "CLK40M" IO_TYPE=LVDS25 ; ###################################################################### # GTBSR32 pins ###################################################################### # You can connect one of Jan Hoffman's GTBSR32 module made for the HIRICH # used in the SPALADIN experiment. Mind the orientation! # strobe for address mode, input # LOCATE COMP "GTB_DSTR" SITE "A10" ; # IOBUF PORT "GTB_DSTR" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # token readout enable. token in, input # LOCATE COMP "GTB_REN" SITE "E6" ; # IOBUF PORT "GTB_REN" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # interrupt to GTB, output # LOCATE COMP "GTB_IRQIN" SITE "A6" ; # IOBUF PORT "GTB_IRQIN" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # interrupt from GTB, input # LOCATE COMP "GTB_IRQOUT" SITE "AF5" ; # IOBUF PORT "GTB_IRQOUT" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # 50MHz clock, input # LOCATE COMP "GTB_SCLK" SITE "A7" ; # IOBUF PORT "GTB_SCLK" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # CPU hold, input # LOCATE COMP "GTB_HOLD" SITE "AD9" ; # IOBUF PORT "GTB_HOLD" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # CPU hold acknowledge, output # LOCATE COMP "GTB_HOLDA" SITE "AF6" ; # IOBUF PORT "GTB_HOLDA" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # data strobe for token mode, output # LOCATE COMP "GTB_DSTS" SITE "AE3" ; # IOBUF PORT "GTB_DSTS" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # data acknowledge, input # LOCATE COMP "GTB_DACK" SITE "AE5" ; # IOBUF PORT "GTB_DACK" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # main board selected, input # LOCATE COMP "GTB_SELECT" SITE "F10" ; # IOBUF PORT "GTB_SELECT" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # mainboard CSR area selected, input # LOCATE COMP "GTB_SECSR" SITE "AF3" ; # IOBUF PORT "GTB_SECSR" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # data transfer ready. token out, output # LOCATE COMP "GTB_RDY" SITE "B10" ; # IOBUF PORT "GTB_RDY" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # data transfer direction, input # LOCATE COMP "GTB_PDIR" SITE "D5" ; # IOBUF PORT "GTB_PDIR" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # reset signal, input # LOCATE COMP "GTB_RESET" SITE "E10" ; # IOBUF PORT "GTB_RESET" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # mode control bits, inputs # LOCATE COMP "GTB_MO_3" SITE "E11" ; # IOBUF PORT "GTB_MO_3" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_MO_2" SITE "B9" ; # IOBUF PORT "GTB_MO_2" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_MO_1" SITE "D4" ; # IOBUF PORT "GTB_MO_1" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_MO_0" SITE "A9" ; # IOBUF PORT "GTB_MO_0" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # control bits, inputs # LOCATE COMP "GTB_CTR_3" SITE "AF4" ; # IOBUF PORT "GTB_CTR_3" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_CTR_2" SITE "AD7" ; # IOBUF PORT "GTB_CTR_2" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_CTR_1" SITE "D11" ; # IOBUF PORT "GTB_CTR_1" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_CTR_0" SITE "B8" ; # IOBUF PORT "GTB_CTR_0" IO_TYPE=LVTTL33 PULLMODE=NONE ; # # status bits, outputs # LOCATE COMP "GTB_STA_3" SITE "AE4" ; # IOBUF PORT "GTB_STA_3" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_STA_2" SITE "AD8" ; # IOBUF PORT "GTB_STA_2" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_STA_1" SITE "D12" ; # IOBUF PORT "GTB_STA_1" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_STA_0" SITE "A8" ; # IOBUF PORT "GTB_STA_0" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # data bits, bidirectional # LOCATE COMP "GTB_D_31" SITE "AF7" ; # IOBUF PORT "GTB_D_31" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_30" SITE "AC8" ; # IOBUF PORT "GTB_D_30" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_29" SITE "AF8" ; # IOBUF PORT "GTB_D_29" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_28" SITE "AD10" ; # IOBUF PORT "GTB_D_28" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_27" SITE "AE8" ; # IOBUF PORT "GTB_D_27" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_26" SITE "AC9" ; # IOBUF PORT "GTB_D_26" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_25" SITE "AF9" ; # IOBUF PORT "GTB_D_25" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_24" SITE "AC10" ; # IOBUF PORT "GTB_D_24" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_23" SITE "AE9" ; # IOBUF PORT "GTB_D_23" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_22" SITE "AC11" ; # IOBUF PORT "GTB_D_22" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_21" SITE "AF10" ; # IOBUF PORT "GTB_D_21" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_20" SITE "AC12" ; # IOBUF PORT "GTB_D_20" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_19" SITE "AE10" ; # IOBUF PORT "GTB_D_19" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_18" SITE "AD12" ; # IOBUF PORT "GTB_D_18" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_17" SITE "AF11" ; # IOBUF PORT "GTB_D_17" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_16" SITE "AF12" ; # IOBUF PORT "GTB_D_16" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_15" SITE "C8" ; # IOBUF PORT "GTB_D_15" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_14" SITE "A11" ; # IOBUF PORT "GTB_D_14" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_13" SITE "D10" ; # IOBUF PORT "GTB_D_13" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_12" SITE "A12" ; # IOBUF PORT "GTB_D_12" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_11" SITE "C9" ; # IOBUF PORT "GTB_D_11" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_10" SITE "D6" ; # IOBUF PORT "GTB_D_10" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_9" SITE "C10" ; # IOBUF PORT "GTB_D_9" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_8" SITE "E7" ; # IOBUF PORT "GTB_D_8" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_7" SITE "C11" ; # IOBUF PORT "GTB_D_7" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_6" SITE "D7" ; # IOBUF PORT "GTB_D_6" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_5" SITE "G13" ; # IOBUF PORT "GTB_D_5" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_4" SITE "D8" ; # IOBUF PORT "GTB_D_4" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_3" SITE "C12" ; # IOBUF PORT "GTB_D_3" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_2" SITE "C7" ; # IOBUF PORT "GTB_D_2" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_1" SITE "F13" ; # IOBUF PORT "GTB_D_1" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # LOCATE COMP "GTB_D_0" SITE "D9" ; # IOBUF PORT "GTB_D_0" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # address bits, inputs # LOCATE COMP "GTB_A_23" SITE "AD3" ; # IOBUF PORT "GTB_A_23" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_22" SITE "AD5" ; # IOBUF PORT "GTB_A_22" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_21" SITE "AE2" ; # IOBUF PORT "GTB_A_21" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_20" SITE "AD4" ; # IOBUF PORT "GTB_A_20" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_19" SITE "AD2" ; # IOBUF PORT "GTB_A_19" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_18" SITE "AC5" ; # IOBUF PORT "GTB_A_18" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_17" SITE "AD1" ; # IOBUF PORT "GTB_A_17" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_16" SITE "AD6" ; # IOBUF PORT "GTB_A_16" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_15" SITE "G9" ; # IOBUF PORT "GTB_A_15" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_14" SITE "C5" ; # IOBUF PORT "GTB_A_14" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_13" SITE "E8" ; # IOBUF PORT "GTB_A_13" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_12" SITE "A5" ; # IOBUF PORT "GTB_A_12" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_11" SITE "F9" ; # IOBUF PORT "GTB_A_11" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_10" SITE "C4" ; # IOBUF PORT "GTB_A_10" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_9" SITE "F8" ; # IOBUF PORT "GTB_A_9" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_8" SITE "A4" ; # IOBUF PORT "GTB_A_8" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_7" SITE "G8" ; # IOBUF PORT "GTB_A_7" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_6" SITE "C3" ; # IOBUF PORT "GTB_A_6" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_5" SITE "F7" ; # IOBUF PORT "GTB_A_5" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_4" SITE "A3" ; # IOBUF PORT "GTB_A_4" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_3" SITE "G7" ; # IOBUF PORT "GTB_A_3" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_2" SITE "B3" ; # IOBUF PORT "GTB_A_2" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_1" SITE "G10" ; # IOBUF PORT "GTB_A_1" IO_TYPE=LVTTL33 PULLMODE=NONE ; # LOCATE COMP "GTB_A_0" SITE "B2" ; # IOBUF PORT "GTB_A_0" IO_TYPE=LVTTL33 PULLMODE=NONE ; ###################################################################### # ADC pins ###################################################################### # LVDS input, 240MHz DDR clock from ADS5271 # LOCATE COMP "ADC_LCLK" SITE "AA1" ; # IOBUF PORT "ADC_LCLK" IO_TYPE=LVDS25 ; # # LVDS input, 40MHz word frame from ADS5271 # LOCATE COMP "ADC_ADCLK" SITE "E1" ; # IOBUF PORT "ADC_ADCLK" IO_TYPE=LVDS25 ; # # LVDS inputs, one per channel, serialized DDR data # LOCATE COMP "ADC_OUT_8" SITE "G1" ; # IOBUF PORT "ADC_OUT_8" IO_TYPE=LVDS25 ; # LOCATE COMP "ADC_OUT_7" SITE "J1" ; # IOBUF PORT "ADC_OUT_7" IO_TYPE=LVDS25 ; # LOCATE COMP "ADC_OUT_6" SITE "K1" ; # IOBUF PORT "ADC_OUT_6" IO_TYPE=LVDS25 ; # LOCATE COMP "ADC_OUT_5" SITE "M1" ; # IOBUF PORT "ADC_OUT_5" IO_TYPE=LVDS25 ; # LOCATE COMP "ADC_OUT_4" SITE "P1" ; # IOBUF PORT "ADC_OUT_4" IO_TYPE=LVDS25 ; # LOCATE COMP "ADC_OUT_3" SITE "T1" ; # IOBUF PORT "ADC_OUT_3" IO_TYPE=LVDS25 ; # LOCATE COMP "ADC_OUT_2" SITE "W2" ; # IOBUF PORT "ADC_OUT_2" IO_TYPE=LVDS25 ; # LOCATE COMP "ADC_OUT_1" SITE "W1" ; # IOBUF PORT "ADC_OUT_1" IO_TYPE=LVDS25 ; # # LVTTL output for SPI programming of the ADS5271 # LOCATE COMP "ADC_SDI" SITE "AB10" ; # IOBUF PORT "ADC_SDI" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; # # LVTTL output for SPI programming of the ADS5271 # LOCATE COMP "ADC_SCK" SITE "AB11" ; # IOBUF PORT "ADC_SCK" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; # # LVTTL output, 40MHz master clock for ADS5271. MUST BE PRESENT. # LOCATE COMP "ADC_CLK" SITE "AB12" ; # IOBUF PORT "ADC_CLK" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; # # LVTTL output for reseting the ADS5271 # LOCATE COMP "ADC_RESET" SITE "AB13" ; # IOBUF PORT "ADC_RESET" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # LVTTL output for SPI programming of the ADS5271 # LOCATE COMP "ADC_CS" SITE "AC7" ; # IOBUF PORT "ADC_CS" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; # # LVTTL output, power down the ADS5271 # LOCATE COMP "ADC_PD" SITE "AB6" ; # IOBUF PORT "ADC_PD" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; ###################################################################### # SPI FlashROM pins ###################################################################### # NOT USED UP TO NOW, better keep away from them. # SPI user clock, output #LOCATE COMP "U_SPI_SCK" SITE "AA14"; #IOBUF PORT "U_SPI_SCK" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8; # SPI serial data in, output #LOCATE COMP "U_SPI_SDI" SITE "AA15"; #IOBUF PORT "U_SPI_SDI" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8; # SPI chip select, output #LOCATE COMP "U_SPI_CS" SITE "AB16"; #IOBUF PORT "U_SPI_CS" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8; # SPI serial data out, input #LOCATE COMP "U_SPI_SDO" SITE "AB17"; #IOBUF PORT "U_SPI_SDO" IO_TYPE=LVTTL33 PULLMODE=NONE; ###################################################################### # APV connector 0 pins ###################################################################### # APV clock output, 40MHz phase shifted to the ADC clock. # LOCATE COMP "APV0_CLK" SITE "Y3" ; # IOBUF PORT "APV0_CLK" IO_TYPE=LVDS25 ; # # APV trigger output, synchronous to the APV clock. # LOCATE COMP "APV0_TRG" SITE "AA5" ; # IOBUF PORT "APV0_TRG" IO_TYPE=LVDS25 ; # # APV 1wire ID chips, not tested up to now. # LOCATE COMP "APV0_1W_3" SITE "AC13" ; # LOCATE COMP "APV0_1W_2" SITE "AB14" ; # LOCATE COMP "APV0_1W_1" SITE "AC14" ; # LOCATE COMP "APV0_1W_0" SITE "AB15" ; # # APV I2C data line, 2.5V logic level. # LOCATE COMP "APV0_SDA" SITE "Y7" ; # IOBUF PORT "APV0_SDA" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=16 ; # # APV I2C clock line, 2.5V logic level # LOCATE COMP "APV0_SCL" SITE "W6" ; # IOBUF PORT "APV0_SCL" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=16 ; # # APV reset line, 2.5V logic level # LOCATE COMP "APV0_RST" SITE "Y6" ; # IOBUF PORT "APV0_RST" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=16 ; # # APV reserved signal, DO NOT USE. # LOCATE COMP "APV0_GPIO" SITE "Y5" ; # IOBUF PORT "APV0_GPIO" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=8 ; ###################################################################### # APV connector 1 pins ###################################################################### # APV clock output, 40MHz phase shifted to the ADC clock. # LOCATE COMP "APV1_CLK" SITE "D3" ; # IOBUF PORT "APV1_CLK" IO_TYPE=LVDS25 ; # # APV trigger output, synchronous to the APV clock. # LOCATE COMP "APV1_TRG" SITE "C2" ; # IOBUF PORT "APV1_TRG" IO_TYPE=LVDS25 ; # # APV 1wire ID chips, not tested up to now. # LOCATE COMP "APV1_1W_3" SITE "D13" ; # LOCATE COMP "APV1_1W_2" SITE "D14" ; # LOCATE COMP "APV1_1W_1" SITE "D15" ; # LOCATE COMP "APV1_1W_0" SITE "D16" ; # # APV I2C data line, 2.5V logic level. # LOCATE COMP "APV1_SDA" SITE "F6" ; # IOBUF PORT "APV1_SDA" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=16 ; # # APV I2C clock line, 2.5V logic level # LOCATE COMP "APV1_SCL" SITE "F5" ; # IOBUF PORT "APV1_SCL" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=16 ; # # APV reset line, 2.5V logic level # LOCATE COMP "APV1_RST" SITE "F4" ; # IOBUF PORT "APV1_RST" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=16 ; # # APV reserved signal, DO NOT USE. # LOCATE COMP "APV1_GPIO" SITE "E4" ; # IOBUF PORT "APV1_GPIO" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=8 ; ###################################################################### # DS1822Z serial number pin ###################################################################### # This 1wire ID chip is for TRBnet. # Watch out: it is in "parasitic" mode. LOCATE COMP "ONEWIRE" SITE "E13"; IOBUF PORT "ONEWIRE" IO_TYPE=LVTTL33 PULLMODE=UP; ###################################################################### # external LVDS input pins ###################################################################### #LOCATE COMP "EXT_IN_3" SITE "W24"; #IOBUF PORT "EXT_IN_3" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "EXT_IN_2" SITE "W25"; #IOBUF PORT "EXT_IN_2" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "EXT_IN_1" SITE "T24"; #IOBUF PORT "EXT_IN_1" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "EXT_IN_0" SITE "V24"; #IOBUF PORT "EXT_IN_0" IO_TYPE=LVTTL33 PULLMODE=NONE ; ###################################################################### # LEDs ###################################################################### # five LEDs are for the FPGA, three LEDs for the uC. LOCATE COMP "FPGA_LED_4" SITE "M21" ; IOBUF PORT "FPGA_LED_4" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; LOCATE COMP "FPGA_LED_3" SITE "L22" ; IOBUF PORT "FPGA_LED_3" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; LOCATE COMP "FPGA_LED_2" SITE "H20" ; IOBUF PORT "FPGA_LED_2" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; LOCATE COMP "FPGA_LED_1" SITE "F22" ; IOBUF PORT "FPGA_LED_1" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; LOCATE COMP "FPGA_LED_0" SITE "F23" ; IOBUF PORT "FPGA_LED_0" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; ###################################################################### # ATmega640 pins ###################################################################### # There is no support for DPRAM yet in the uC firmware #LOCATE COMP "UC_SDA" SITE "H25"; #IOBUF PORT "UC_SDA" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_SCL" SITE "H26"; #IOBUF PORT "UC_SCL" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_RD" SITE "J25"; #IOBUF PORT "UC_RD" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_WR" SITE "J26"; #IOBUF PORT "UC_WR" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_ALE" SITE "T26"; #IOBUF PORT "UC_ALE" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_A_15" SITE "N25"; #IOBUF PORT "UC_A_15" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_A_14" SITE "N26"; #IOBUF PORT "UC_A_14" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_A_13" SITE "N24"; #IOBUF PORT "UC_A_13" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_A_12" SITE "M26"; #IOBUF PORT "UC_A_12" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_A_11" SITE "M23"; #IOBUF PORT "UC_A_11" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_A_10" SITE "L26"; #IOBUF PORT "UC_A_10" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_A_9" SITE "K25"; #IOBUF PORT "UC_A_9" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_A_8" SITE "K26"; #IOBUF PORT "UC_A_8" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_AD_7" SITE "U24"; #IOBUF PORT "UC_AD_7" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_AD_6" SITE "U26"; #IOBUF PORT "UC_AD_6" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_AD_5" SITE "U25"; #IOBUF PORT "UC_AD_5" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_AD_4" SITE "V26"; #IOBUF PORT "UC_AD_4" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_AD_3" SITE "V25"; #IOBUF PORT "UC_AD_3" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_AD_2" SITE "W26"; #IOBUF PORT "UC_AD_2" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_AD_1" SITE "Y26"; #IOBUF PORT "UC_AD_1" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_AD_0" SITE "AA26"; #IOBUF PORT "UC_AD_0" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=8 ; #LOCATE COMP "UC_FPGA_3" SITE "T23"; #IOBUF PORT "UC_FPGA_3" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_FPGA_2" SITE "R26"; #IOBUF PORT "UC_FPGA_2" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_FPGA_1" SITE "P25"; #IOBUF PORT "UC_FPGA_1" IO_TYPE=LVTTL33 PULLMODE=NONE ; #LOCATE COMP "UC_FPGA_0" SITE "P26"; #IOBUF PORT "UC_FPGA_0" IO_TYPE=LVTTL33 PULLMODE=NONE ; ###################################################################### # Debug and expansion header (SMC26) ###################################################################### # That's your playground, feel free to debug here. LOCATE COMP "FPGA_EXP_15" SITE "P23" ; IOBUF PORT "FPGA_EXP_15" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_14" SITE "M22" ; IOBUF PORT "FPGA_EXP_14" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_13" SITE "P22" ; IOBUF PORT "FPGA_EXP_13" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_12" SITE "L24" ; IOBUF PORT "FPGA_EXP_12" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_11" SITE "N23" ; IOBUF PORT "FPGA_EXP_11" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_10" SITE "K23" ; IOBUF PORT "FPGA_EXP_10" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_9" SITE "N22" ; IOBUF PORT "FPGA_EXP_9" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_8" SITE "K24" ; IOBUF PORT "FPGA_EXP_8" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_7" SITE "P24" ; IOBUF PORT "FPGA_EXP_7" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_6" SITE "J23" ; IOBUF PORT "FPGA_EXP_6" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_5" SITE "R22" ; IOBUF PORT "FPGA_EXP_5" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_4" SITE "J24" ; IOBUF PORT "FPGA_EXP_4" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_3" SITE "R24" ; IOBUF PORT "FPGA_EXP_3" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_2" SITE "H24" ; IOBUF PORT "FPGA_EXP_2" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_1" SITE "R23" ; IOBUF PORT "FPGA_EXP_1" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; LOCATE COMP "FPGA_EXP_0" SITE "H21" ; IOBUF PORT "FPGA_EXP_0" IO_TYPE=LVTTL33 PULLMODE=NONE DRIVE=4 ; ###################################################################### # SerDes pins ###################################################################### # SerDes connection - SD_RXD & SD_TXD are here for completeness only #LOCATE COMP "SD_RXD_P" SITE "A15"; #IOBUF PORT "SD_RXD_P" IO_TYPE=LVDS25 DRIVE=4 ; #LOCATE COMP "SD_RXD_N" SITE "B15"; #IOBUF PORT "SD_RXD_N" IO_TYPE=LVDS25 DRIVE=4 ; #LOCATE COMP "SD_TXD_P" SITE "A18"; #IOBUF PORT "SD_TXD_P" IO_TYPE=LVDS25 DRIVE=4 ; #LOCATE COMP "SD_TXD_N" SITE "B18"; #IOBUF PORT "SD_TXD_N" IO_TYPE=LVDS25 DRIVE=4 ; LOCATE COMP "SD_MD_2" SITE "F24"; IOBUF PORT "SD_MD_2" PULLMODE=UP IO_TYPE=LVTTL33 ; LOCATE COMP "SD_MD_1" SITE "E24"; IOBUF PORT "SD_MD_1" PULLMODE=UP IO_TYPE=LVTTL33 ; LOCATE COMP "SD_MD_0" SITE "H22"; IOBUF PORT "SD_MD_0" PULLMODE=UP IO_TYPE=LVTTL33 ; LOCATE COMP "SD_TXDIS" SITE "F26"; IOBUF PORT "SD_TXDIS" PULLMODE=DOWN IO_TYPE=LVTTL33 ; LOCATE COMP "SD_LOS" SITE "G23"; IOBUF PORT "SD_LOS" PULLMODE=UP IO_TYPE=LVTTL33 ; LOCATE COMP "SD_TXFAULT" SITE "G26"; IOBUF PORT "SD_TXFAULT" PULLMODE=UP IO_TYPE=LVTTL33 ; LOCATE COMP "SD_RATE" SITE "H23"; IOBUF PORT "SD_RATE" PULLMODE=DOWN IO_TYPE=LVTTL33 ; ###################################################################### # FPGA boot et. al. ###################################################################### SYSCONFIG PERSISTENT=OFF ; SYSCONFIG CONFIG_MODE=SPI ; SYSCONFIG DONE_OD=OFF ; SYSCONFIG DONE_EX=OFF ; SYSCONFIG MCCLK_FREQ=34 ; SYSCONFIG CONFIG_SECURE=OFF ; SYSCONFIG WAKE_UP=21 ; #SYSCONFIG WAKE_ON_LOCK=OFF ; SYSCONFIG COMPRESS_CONFIG=OFF ; SYSCONFIG INBUF=OFF ; SYSCONFIG ENABLE_NDR=OFF ; USERCODE HEX "DEADAFFE" ; FREQUENCY PORT "CLK40M" 100.000000 MHz ;