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Here the TRB Version 1 are listed where they are used and their current status

de-etrax where status additional information last update
001 cracow Ok changes for common Hades bus was made 2006-07-05
002 Coimbra Ok Third TDC is broken,Changes on board:R381 removed, signal from R381 put to 3.3V on R380,changes for common Hades bus was made 2007-03-05
003 GSI Not ok Was burnt - now we have to check if it still can be included in HADES DAQ 2006-07-05
004 GSI Ok changes for common Hades bus was made,all chanels tested - "only" ref channel left 2007-03-05
005 GSI Ok changes for common Hades bus was made,ref channel ok, all channels tested 2007-03-14
006 GSI Ok changes for common Hades bus was made ,all channels tested - "only" ref channel left 2007-03-05
007 GSI Ok changes for common Hades bus was made, all chanels tested - "only" ref channel left 2007-03-05

Here the EtraxFS-DEV1 are listed where they are used and their current status

de-etrax location status additional information last update
X SN: 1 GSI Should be added clock to TLK   2006-10-23
X SN: 2 - 3 GSI OK , 100 MHz clock added   2006-10-23
X SN: 4 GSI OK, but there is TLK 1501   2006-10-23
X SN: 5 Cracow OK, 100 Mhz clock added   2006-11-02
X SN: 6 - 7 GSI not tested   2006-10-23
X SN: 8 Giesen without second flash and 100 MHz clock not added   2006-10-23
X SN: 9 GSI without second flash and 100 MHz clock not added   2006-12-01

Here the TRB Version 2 are listed where they are used and their current status

de-etrax where status additional information last update
008 GSI OK Etrax was exchanged, needs modification on board - termination resistors on board and clock enable for TDC's 2007-03-05
009 GSI OK modification on board: termination resistors for FPGA clock and TDC clock, clock enable for TDC's 2007-01-05

-- MarekPalka - 03 Jul 2006
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Topic revision: r16 - 2007-03-14, MarekPalka
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