takes an INPUT_IN pattern and generate an RESULT_OUT pattern with only one bit enabled. Fixed priority is possible as well as round robin. The RESULT_OUT pattern is delayed by one CLK cycle, but it tries to look-forward and set one of the bits in advance, when INPUT_IN is zero.
|| Input pattern
|| Output pattern
|| Set to 1, otherwise RESULT_OUT always 0
|| see below
|| Round robin cyclic pattern
|| Write the RR_PATTERN now
|| Enable rolling of the RR_PATTERN
Round robin is used, when the first bit of the RR_PATTERN is enabled. In order to mix RR with fixed priority, the
RR_PATTERN should be constructed with a mixture of 1's and 0's, and the ROL bit should be enabled. In this case, with each CLK cycle the pattern is rolled.
- 14 Feb 2007