The pictures shown are a sized down. Download the file from the table to see the high resolution version.
Connect Temperature Sensor to FPGA: Via one data line from temperature sensor to pin AK17 / JT266 of FPGA. (This is the outermost testpad in a row of four next to C673.
The Via is the uppermost in a group of three in a triangle form.
Connect Temperature Sensor to FPGA: Via on data line from temperature sensor to pin AK17 / JT266 of FPGA. (This is the outermost testpad in a row of four next to C673.
The Via is the single one right of R45.
- The white line is the TCK-wire.:
TRB2b and TRB2c
They need a patch for the JTAG communication to work reliably. A 50 Ohm resistor in series with the TCK line coming from the ETRAX will do the job. So the line has to be cut and a 50Ohm resistor has to bridge the gap.
Here are the pictures for that:
Connect Temperature Sensor to FPGA1: FPGA-pin H1(lower left pin with testpad) to Pin 80 of AddOn-Connector JTRB2.
MDC Optical AddOn
Connect Temperature Sensor to FPGA2: FPGA2-Pin AD1 / JT32 (rightmost pad in a group of six) to Via under sensor (right one in row of four).
- 26 Mar 2009
No connection on SCK and CS signals between DAC groups and lost connection between UD17 SDO to UD1 SDI.
Needed patches (example, because it is enough to connect pin 7 and 8 between groups):
UD1 pin 7 -> UD2 pin 7
UD1 pin 8 -> UD2 pin 8
UD5 pin 7 -> UD6 pin 7
UD5 pin 8 -> UD6 pin 8
UD9 pin 7 -> UD10 pin 7
UD9 pin 8 -> UD10 pin 8
UD13 pin 7 -> UD14 pin 7
UD13 pin 8 -> UD14 pin 8