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VME addresses for every given register

This is the official source of information.

AddressSorted ascending Description comments
0 Delay value for PTI1  
1c Downscale value for PTI1  
2c Downscale value for PTI5  
3c Width value for PTI1  
4 Delay value for PTI2  
4c Width value for PTI5  
5c MUX 1 selection  
6c Scaler register PTI3 (read only)  
7c Scaler register VS (read only)  
8 Delay value for PTI3  
8c Scaler reset  
9c Scaler register for TOF (read only)  
10 Delay value for PTI5  
14 Delay value for TS  
18 Delay value for VS  
20 Downscale value for PTI2  
24 Downscale value for PTI3  
28 Downscale value for PTI4  
30 Downscale value for TS  
34 Downscale value for VS  
38 Downscale value for local clock  
40 Width value for PTI2  
44 Width value for PTI3  
48 Width value for PTI4  
50 Width value for TS  
54 Width value for VS  
58 OR on/off  
60 MUX 2 selection  
64 Scaler register PTI1 (read only)  
68 Scaler register PTI2 (read only)  
70 Scaler register PTI4 (read only)  
74 Scaler register PTI5 (read only)  
78 Scaler register TS (read only)  
80 Enable input  
84 Width for GT (output)  
88 Communication bus enable (TRB + DTU)  
90 Enable MDC/TOF branch + Width value for MCD_TOF_out  
94 Scaler channel selection for TOF and MDC  
98 Scaler register for MDC (read only)  
a0 PTI5 (mux2) and TS (mux1) alternate input  
a4 Delay value for Beam signal  
a4 High voltage inhibit dealy  
a8 Width value for Beam signal  
a8 High voltage internal inhibit width  
ac High voltage external inhibit width  
b0 Disable TS gating  
b4 Scaler register Dead time (read only)  
b8 Scaler register PTI1 accepted (read only)  
bc Scaler register PTI2 accepted (read only)  
c Delay value for PTI4  
c0 Scaler register PTI3 accepted (read only)  
c4 Scaler register PTI4 accepted (read only)  
c8 Scaler register PTI5 accepted (read only)  
cc Scaler register TS accepted (read only)  
d0 Scaler register VS accepted (read only)  
d4 Scaler register MUX 1 (read only)  
d8 Scaler register MUX 2 (read only)  
dc Calibration trigger disable  
e0 DTU error  
offset (hex)    

-- SergeyYurevich - 11 Apr 2008
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Topic revision: r2 - 2008-06-25, MichaelTraxler
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