Overview

The TrbNetPriorityArbiter takes an INPUT_IN pattern and generate an RESULT_OUT pattern with only one bit enabled. Fixed priority is possible as well as round robin. The RESULT_OUT pattern is delayed by one CLK cycle, but it tries to look-forward and set one of the bits in advance, when INPUT_IN is zero.

Signal description

Line Decription
INPUT_IN Input pattern
RESULT_OUT Output pattern
ENABLE Set to 1, otherwise RESULT_OUT always 0
CTRL see below

CTRL

PIN Name Description
0-7 RR_PATTERN Round robin cyclic pattern
8 WRITE_MASK Write the RR_PATTERN now
9 ROL Enable rolling of the RR_PATTERN

Functional description

Round robin is used, when the first bit of the RR_PATTERN is enabled. In order to mix RR with fixed priority, the RR_PATTERN should be constructed with a mixture of 1's and 0's, and the ROL bit should be enabled. In this case, with each CLK cycle the pattern is rolled.

-- IngoFroehlich - 14 Feb 2007

This topic: DaqSlowControl > OutdatedPages > DaqNetwork > TrbNetEntities > TrbNetIOMultiplexer > TrbNetPriorityArbiter
Topic revision: 2007-02-14, IngoFroehlich
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