TOF AddOn2 Manual

TOF-FEE 128 channel TRB AddOn module for HADES, original document: TRB-TOF-AddOn.pdf.

The design of TOF-FEE 128 channel Time over Threshold (ToT) front-end amplifier-discriminator module is optimized for PMT TOF applications. An excellent timing performance is provided by 8-channel ASIC NINO integrated circuits, designed at CERN for LIACE TOF system. A power dissipation is less than 80mW per AddOn TOF channel.

Common parameters for TOF AddOn:

Structure of one channel of AddOn Time over Threshold amplifier-discriminator:

8-channel NINO ASIC was designed for ToT methos time walk correction. Fast NINO discriminator (FAST part) provides leading edge of output pulse. Shape discriminator (SLOW part) provides trailing edge of output pulse on second NINO channel, combined with shaper unit. Special shaper provides a persistence of pulse width (ToT) dependence of PM amplitudes. Using two different NINO ASIC's for one channel of AddOn allows simple separate adjustment of thresholds, hysteresis and stretch timing for Fast and Slow discriminator parts.

Structure and Control Signals

128-channel AddOn TOF module structure:

Module consists of:

• Four identical 32-channel discriminator parts
• Common board internal DAC for TOTAL THRESHOLD, HYSTERESIS and STRETCHER control
• 16 DAC's for THRESHOLD control by 128 CHANNELS individually
• Analog multiplicity schematic with 128-OR function, negative output polarity of "OR_128" signal
• TEST fanout schematic for monitoring all 128 discriminator channels
• TIME REFERENCE fanout schematic
• POWER SUPPLY DC-DC converters
• Temperature sensor

COMMON THRESHOLD settings

Separate THRESHOLD control signals for FAST and SLOW parts:

• THRESHOLD FAST common signal for all 128 channels
• THRESHOLD SLOW common signal for all 128 channels
• Output DAC's voltage range (0-2.5)V corresponds to threshold range (0-110)mV
• Used DAC1, part A (FAST), part B (SLOW)

INDIVIDUAL THRESHOLD settings

INDIVIDUAL THRESHOLD 128 signals for FAST and SLOW parts:

• Outout DAC's voltage range (0-2.5)V corresponds to input referred threshold range from -35mV to +50mV from total threshold level
• Used DAC's (2-17)

STRETCH TIME settings

Separate STRETCH TIME control signals for FAST and SLOW parts:

• STRETCH TIME FAST common signal for all 128 channels
• STRETCH TIME SLOW common signal for all 128 channels
• Output DAC control voltage range of (0.5-2.5)V corresponds to a time range showen in figure below
• Usual STRETCH TIME is 10ns. This corresponds to a cotrol voltage of +1.2V
• Used DAC1, part C (FAST), part D (SLOW)

HYSTERESIS common settings

Separate HYSTERESIS control signals for FAST and SLOW parts:

• HYSTERESIS FAST common signal for all 128 channels
• HYSTERESIS SLOW common signal for all 128 channels
• Output DAC control voltage is (0.5-2.5)V. Corresponding hysteresis range is (0-13)%
• Default HYSTERESIS valuse is (1-2)%. Corresponding control voltage is +1.2V
• Used DAC1, part E (FAST), part F (SLOW)

TIME REFERENCE

External TIME REFERENCE signal on LVDS levels is received from TYCO connector and fanouted to each 32-channel module. It is added to each 32-nd channel of connectos JTDC1,JTDC2,JTDC3,JTDC4 by OR function.

TESTING (monitoring of all channels)