Agenda:

introduction

Attilios Talk about MDC readout via TRB

identified projects:

TRB Add-on board - old driver cards A.T.

• thresholds, loading of configuration and cal files A.T. end Feb - mid March
• timing of writing TDC config A.T.
• interleaving trigger and readout
• read-back of config and database version no
• debug interface on TRB R.T. +(M.P.)
• auto tuning, statistics (B.K. definition) , K.T. (ask Herbert)

TRB add-on with optical transmission and new driver cards A.T.

• optical link functionality M.P. mid Jan.
• move of Virtex functionality to Lattice on the driver card A.T. start mid Mar - end May
• TRB receiver and mux -same as hub- M.P. + J.M. 4 weeks
• config load via TRB-net
• debug interface via TRB-net
• test influence of FPGA (driver card) on noise in MBOs

unpacker, data format J.W.

• MBOno in data word

Eventbuilding J.M. + I.F.

• Eventbuilding in MBO order?

preparation of "roc and cal files" J.W.

Other to do items:

• mechanical integration, cabling, housing, cooling
• optical fibers, min. bending radius 5cm?
• in power chains
• for inner chambers: power chain to TRB stack, 16 optical pairs per chamber + low voltage flat cable + CS cable - all together in a flexible tube?
• make test with cut and fit together fibers, connector tubes?
• for outer chambers: on sector or not?
• manpower for refitting chambers with new driver cards, optical fibers etc. after next beam time Oct or Nov 08 for MDC1 anyhow, Erwin, Thorsten, NNRossendorf +... for MDC 2-4 , Erwin, Thorsten, +...
• money for driver cards +...

additional boards

power distribution, common stop distribution NN (important)

• max cable length 3m
• 5V power limited (for CPLD)
• + 3V stabilized
• common stop (LVDS)
• write specs
• find somebody to do it

HV boxes (LVL1 stuff)

• testing at FZD
• testing at GSI

Klaus Heidels report on FPC cables for the new chambers.

• Layer 1 and 2 problem with interchanged signal and ground wires, will be fixed by laser cutting and new connection. Also blind wires for noise canceling are missing.
• Layers 3 to 6 are ok.
• A.T. will make a test measurement with cable from layer 1 and a layer 3 as comparison, noise, test pulser. J.W. and K.H. will come to GSI after 7th of Jan for this test.

C.M. report about HV-Filterbox

• proposal to build new boxes with signal output for cathode wires (LVL1 trigger). 13 boxes are needed to test on one chamber with Sergey Ch. the modified amplifier board. K.H. will build them up to end of Jan. Cable length needed. See below:
• new-HV-Filter.pdf: HV Filter: schematics and cable lengths
• HVFilteFZR12-2007.txt: K. Heidels reply