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You are here: Foswiki>DaqSlowControl Web>WebChanges (2001-08-16, PeterThoeny)Edit Attach
50 recent changes in DaqSlowControl Web retrieved at 05:18 (Local)
TrbNetEntities
Overview The "normal" TrbNetEndPoint consists of up to 16 TrbNetIOBUF. Special endpoints for dedicated reasons have only a subset of TrbNetIOBUF in order to keep ...
r11 - 2009-12-31 - 16:58 by JanMichel
TrbNetUsersGuide
Overview $ trbnet_full_endpoint.pdf : The hades_full_endpoint entity is the central part to connect to the network. Overview Short description of the ports ...
r14 - 2009-12-31 - 16:58 by JanMichel
TrbV2ConnectorsPinout
Connector A (JADDON1) With these connectors (JADDON1 and JADDON2) the Add on board communicates with the TRBv2 board: it receives trigger information and basicall...
r3 - 2009-12-31 - 16:58 by JanMichel
TriggerDistribution
HADES Trigger Distribution System DTU/CTU Manual from Eric * DTU_technical_manual.pdf: DTU / CTU manual * DTU_schematics.pdf: Schematics of DTU CTU/DTU i...
r12 - 2009-12-31 - 16:58 by JanMichel
MDCUpgradeInstallation
Installation and Testing of new MDC DAQ components * OEPBasicTests Testing OEPs and first time programming in Lab * InformationForOEPMounting Bookkeepin...
r2 - 2009-12-30 - 21:49 by JanMichel
MatchingUnit
Matching Unit issues * MatchingUnitAlgorithm (gives some prosa description of the MU algorithm, real docu is still the code trigger.c ) * MatchingUnitSetti...
r7 - 2009-12-28 - 17:34 by JanMichel
LinuxVMECPU
Info about the Linux VME CPUs * LinuxVMECPUInstallation * List of Concurrent VME CPUs and their MAC addresses * AcromagModule Technical Documents * S...
r5 - 2009-12-15 - 22:54 by JanMichel
VULOM3Triggerbox
Level 1 trigger processing by VULOM3 board The old triggerbox has now been replaced by an FPGA module and can be remotely controlled by EPICS. Here is provided so...
r11 - 2009-12-13 - 00:35 by JanMichel
TriggerModule
New Trigger unit based on the universal logic module VULOM3 New Trigger unit based on the universal logic module (Jan Hofmann, GSI) Author: Wolfgang Koenig (load...
r4 - 2009-12-13 - 00:33 by JanMichel
TriggerHub
This is the curent TriggerHub cabling: We definitely need both hub symmetrical, since the UI uses the same template for both Main.MathiasMuench 29 Jan 2005 ...
r10 - 2009-12-13 - 00:32 by JanMichel
TclToOra
Table of contents: The following programs are used to connect to a Hades database: * runinfo2ora.pl * tcl_to_ora runinfo2ora.pl Intro To simplify the pro...
r7 - 2009-12-13 - 00:31 by JanMichel
DtuDebugRegisters
Here i will start writing info on the DTU debug registers. Back to TriggerDistribution. Main.TiagoPerez 12 Nov 2005
r2 - 2009-12-13 - 00:28 by JanMichel
DTU_VHDL_Tiago
DTU in VHDL from Tiago For debugging of the DTU check the DtuDebugRegisters page. RPC DTU debug registers LVL1 DTU_DEBUG_11 DTU_DEBUG_12 DTU_DEBUG_13 = x"00...
r2 - 2009-12-13 - 00:27 by JanMichel
DTU_VME_Problems_Concurrent
Michael Bhmer realized that the DTU/CTU Lattice Desgin, which handles the VME bus, was not working correctly, which only occured when using the Concurrent VME CPU...
r2 - 2009-12-13 - 00:27 by JanMichel
VNCRemoteAccess
VNC connection to hadesdaq and the problems For some unknown reasons the vnc connection (just the authentification) to hadesdaq is not working reliably. The follo...
r3 - 2009-12-13 - 00:24 by JanMichel
TriggerCodes
This text is stolen from Michael Bhmer: http://www hades.gsi.de/daq/rc99/richel_page.html A summary of the HADES trigger codes On this page you can find a summar...
r3 - 2009-12-13 - 00:23 by JanMichel
ThingsToDo
Table of contents: What we have to do.... 1 Ask for a public Wiki group (Hadespub ???) where we can store info for outside people. Nearly all hades pages are...
r16 - 2009-12-13 - 00:21 by JanMichel
TriggerBox
SEP05 settings (since Sep 26 16:00 ) Input Number Input Signal Source Down Scaling 2^X ON / OFF 1 M4 0x5 ON 2 ...
r5 - 2009-12-13 - 00:20 by JanMichel
TOFSubSystem
1 TipSubeventFormat 1 TofSetup 1 TofParams 1 TofCalibration 1 How to to debugging, get really good information: TofDebugging 1 Here are the known T...
r9 - 2009-12-13 - 00:19 by JanMichel
HowStartDAQ
"Nice" version of DAQ System: List of files needed for starting DAQ on TRB: You have to log into the board and program FPGA: /home/hadaq/FPGA_jam_stapl.sh Log ...
r5 - 2009-12-13 - 00:17 by JanMichel
ReadOut
Contents of README file Requirements: bash xterm awk expect daq_evtbuild daq_netmem daq_sniff Description: * config * This configuration file contai...
r4 - 2009-12-13 - 00:13 by JanMichel
RichSubSystem
1 RichAdjustThresholds 1 RichHitsObservation 1 Picture of crates and the corresponding RCs and PRCs * boehmer_diplom.pdf: Diploma Thesis of Michael Bhm...
r6 - 2009-12-13 - 00:12 by JanMichel
ManualEvtBuildJan05
Emergency Event Building Procedure for Jan05 * Switch to workspace "evtb". * There should be two terminal windows on host "lxhadesdaq", directory "/home/had...
r3 - 2009-12-13 - 00:11 by JanMichel
ObsoleteLogOfCrashes
MT: again after reboot of r2f 35: Jan 28 19:09:45 r2f 35 ./daq_rdotrig 129 : HwTip on 18000000 not found Jan 28 19:09:45 r2f 35 ./daq_rdotrig 129 : Construction o...
r9 - 2009-12-13 - 00:06 by JanMichel
TrbDmaReadout
main.pdf: closer description. * readout with dma, v1. frame of event is creating in readout function, result: 80kEv/s 15words/event . * dma v2, where...
r3 - 2009-12-12 - 23:12 by JanMichel
TRBSourceList
Source codes for etrax fs on hadeb05.gsi.de: binary file description ...
r16 - 2009-12-12 - 23:11 by JanMichel
SpiTrbDiagram
* spi_trbv2 diagram: Programming thresholds for RPC is slow, because the function read32_from_FPGA/write32_to_FPGA has to communicate with FPGA bit by bit. ...
r2 - 2009-12-12 - 23:09 by JanMichel
SpiTofRpc
spi_trbv2 The application to set the thresholds for TOF RPC from TRB. It needs the special file with configuration of thresholds(configFile). How To: Log in t...
r5 - 2009-12-12 - 23:08 by JanMichel
FlashTool
To make TRB working: flashTool.tar: Tool to flash the image to TRB Content of README file: To flash this image: 1. set SW1 switch on the board to A, 2. ty...
r3 - 2009-12-12 - 22:50 by JanMichel
TRBFeaturesAndSoftware
List of Features and special codes for TRB * Using jam to program FPGAs * Programming the Flash on TRB * SPI to configure TDCs for TOF and RPC * Sourc...
NEW - 2009-12-12 - 22:21 by JanMichel
FsJamUsing
To program FPGA via jam you should: 1. copy your file.stapl to: hadeb05.gsi.de:/var/diskless/etrax_fs or cerber.if.uj.edu.pl:/home/trebacz/axis_nfs_fs in Craco...
r4 - 2009-12-12 - 22:19 by JanMichel
OEPNetworkAddresses
Network Addresses of MDC Motherboards/OEPs According to NetworkAddresses, all OEP get TrbNet addresses in the range between 0x2000 to 0x2FFF. The second hex digit...
r11 - 2009-10-28 - 11:36 by KathrinGoebel
MDCUpgradeOld
Readout Setup v1 : AddOnv1 and other outdated information Rossendorf Dec07 discussion In Rossendorf we had a discussion about the MDC readout project. The Rossen...
r2 - 2009-10-27 - 19:11 by JanMichel
HowToPrepareServerForTrb
This page tries to explain how to prepare server to handle trb version2. assumptions: 1. server has ethernet interface eth0 with IP: 192.168.0.1 1. trb has...
r3 - 2009-10-27 - 19:08 by JanMichel
VHDLCodeStyle
Hardware programming guidelines * Synchronous design * synchronization of external signals (at very high frequencies use two register) * never...
r17 - 2009-10-27 - 19:05 by JanMichel
DataStructure
Main.AttilioTarantola 03 May 2009 Here follows the new data structure for MDC readout(OEPB). In the following picture (taken from Jan's talk, IKF Seminar 30.04.0...
r11 - 2009-10-27 - 18:54 by JanMichel
SoftwareImplementation
Display Cornelius Kleiner and Christian Kern 22 Jul 2008 description The entity has 4 inputs and 3 outputs. Input Bits Function Output Bits Funktion ...
r4 - 2009-10-27 - 18:53 by JanMichel
HowToRuntheDaq
Main.AttilioTarantola 23 Jul 2009 Configuration parameters for TDCs: * config_mdc_fee.txt: configuration parameters for MDC FEE
r4 - 2009-10-27 - 18:52 by JanMichel
MdcDocumentation
Documentation of new MDC DAQ * DataStructure Event data structure * HowToRuntheDaq Registers on TDC * SoftwareImplementation Display on General Pur...
NEW - 2009-10-27 - 18:51 by JanMichel
MDCDevelopmentAndTesting
Development and Testing of new Hardware * DatawordOutput Example output for event data * DebugLists monitored signals for debugging * HardwareTest ...
NEW - 2009-10-27 - 18:48 by JanMichel
DatawordOutput
Main.AttilioTarantola 04 Jun 2009 Here one can find few dataword samples: Calibration: * out_cal_1_long: calibration data from 1 long Motherboard, all TDCs ena...
r2 - 2009-10-27 - 18:48 by JanMichel
PowerConsumpionTest
Main.AttilioTarantola 12 Dec 2008 Test conditions: the OEPB configures and acquires data continuosly from TDCs. FOT transmits and receives random data. Cali...
r3 - 2009-10-27 - 18:47 by JanMichel
MdcAddonCooperation
MDC Upgrade: Cooperation with Yanyu Wang Introduction In the HADES DAQ Upgrade project the MDC Upgrade is an essential part. The expected data rates for heavy ...
r17 - 2009-10-27 - 18:47 by JanMichel
DebugLists
Main.AttilioTarantola 08 Jan 2009 For each OEPB we should monitor the following information: State Machines states (13 15 entities. 15 registers 8bits each). ...
r3 - 2009-10-27 - 18:47 by JanMichel
HardwareTest
MDC Upgrade: MDC Optical Endpoint Hardware test Here we collect the documents relative hardware measurement Chip's temperatures Main.AttilioTarantola and Ya...
r2 - 2009-10-27 - 18:47 by JanMichel
FlashProgramming
Main.AttilioTarantola 26 Apr 2009 The OEPB flash programming over ETRAX. 1)ETRAX takes OEPB configuration file. 2)ETRAX does block write with increasing addresses...
r4 - 2009-10-27 - 18:35 by JanMichel
TRBAddOns
Here we describe our various AddOn Cards for the TRBv2 HUB AddOn The TRB HUB servers as the trigger fanout module. It has 16 times a 2 GBit/s SFP. The SERDESes a...
r22 - 2009-10-27 - 12:06 by JanMichel
DevBoardPatches
List of patches compiled by Marcin on 06.05.2005 Error list in order of tracing them: 1 RESET is output from ETRAX 1 MRESET is input to ETRAX (place manual ...
r5 - 2009-10-27 - 11:57 by JanMichel
EtraxFSDev1Errors
Things we learned from Etrax_FS_Dev1 1 A Ceramic Capacitor (100V) on 48V is missing (100nF). 1 Take care of the LEDs. They are not correct on the ETRAX_FS_D...
r2 - 2009-10-27 - 11:48 by JanMichel
TrbPatches
AddOns The pictures shown are a sized down. Download the file from the table to see the high resolution version. Trb2 B Connect Temperature Sensor to FPGA: Via o...
r8 - 2009-10-27 - 11:48 by JanMichel
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Topic revision: r1 - 2001-08-16, PeterThoeny
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