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200 recent changes in DaqSlowControl Web retrieved at 08:43 (Local)

Add connection between temperature sensor and FPGA (additional to connection to Etrax) (Fix on Trbv2: wire from via next to Pin1 of temperature sensor to JP266 te...

r3 - 2009-10-27 - 11:48 by JanMichel

TDCReadoutBoardV2bErrors

* The add on connector should be: QTE 040 02 (larger distance between TRB and add on, no impact for the user! Main.MichaelTraxler 05 Jun 2007

r2 - 2009-10-27 - 11:48 by JanMichel

TRBBoardErrors

Errors found in previous design versions * Things we learned from ETRAX_FS_DEV1 * Errors in TRBv2A * Errors in TRBv2B * Errors in TRBv2C * Errors f...

NEW - 2009-10-27 - 11:48 by JanMichel

TDCReadoutBoardV2Errors

LIST OF ERRORS FOUND IN THE TRBv2A DESIGN: * Event and bunch reset signals for TDCs come from FPGA to all four TDCs. In V2 those signals are LVDS and FPGA sho...

r9 - 2009-10-27 - 11:47 by JanMichel

TRBTigerSHARC

TigerSHARC PIN Number of CMOS PINs Comments PINs connected to Virtex4 SCLKRAT 3 PLL muliplier, can be hardwired to 000 at 125MHz 0 SCLK 1...

r2 - 2009-10-27 - 11:45 by JanMichel

OEPBasicTests

Initialize new OEPs I. Connect JTAG cable, then power cable I. Check that 1 LED is on I. Program board via JTAG from IspVM. * Program FPGA directly...

r4 - 2009-10-26 - 15:31 by JanMichel

InformationForOEPMounting

Mounting new Cables and OEP to MDC In this file you can find all information you need before working on the MDC upgrade: * MboDboOnChamber.pdf: INFORMATION FOR...

r11 - 2009-10-26 - 15:31 by JanMichel

SecondRadiationTest

Main.AttilioTarantola 26 Aug 2008 The Optical end point placed at the end of the HADES cave. The logical analyzer connected to hades29. D0: external oscillator D1...

r2 - 2009-10-26 - 15:26 by JanMichel

RossendorfDec07Minutes

Main.BurkhardKolb 14 Dec 2007 Agenda: 11.12.07 introduction Attilios Talk about MDC readout via TRB identified projects: TRB Add on board old driver cards ...

r5 - 2009-10-26 - 15:19 by JanMichel

MdcDcLvl2

Main.AttilioTarantola 25 Mar 2009 MDC DC LVL2 status Board Number where are used status additional information last update 001 Frankfurt Uni Ok ...

r3 - 2009-10-26 - 15:17 by JanMichel

MdcDcLvl1

Main.AttilioTarantola 13 Feb 2009 MDC DC LVL1 status Board Number where are used status additional information last update 001 GSI M.T.Lab Ok ...

r3 - 2009-10-26 - 15:16 by JanMichel

HowToRunMDCDaq

Main.AttilioTarantola 05 Aug 2008 The software configures and takes data from 10 buses. By default all 10 buses are enabled. After you loaded the firmware, the ch...

r18 - 2009-10-26 - 15:12 by JanMichel

TRBSchematicsCollection

Schematics collection * can be found here: DaqSlowControl.TDCReadoutBoardV2#Schematics_Pinout_and_Patches_of Main.MichaelTraxler 17 Dec 2007

r2 - 2009-10-26 - 13:56 by JanMichel

CommonStatusRegister

Common Status Register All network devices have one (or more) 32 Bit status registers. These registers will be read out for example once each second using TRBNet....

r18 - 2009-10-19 - 18:16 by MichaelBoehmer

TrbNetDatafields

Common definitions for the use of TRBNets datafields Packet types The packet type is sent with each 64 bit packet Name Type Description F1 F2 F3 ...

r23 - 2009-10-08 - 13:50 by JanMichel

SPIFlashProgramming

SPI controller description The SPI FlashROM controller is attached to RegIO data bus. The user interface consists of two 32bit registers, and one BlockRAM for dat...

NEW - 2009-09-11 - 12:57 by JanMichel

TrbNetRegIO

Reading and Writing registers over the network TrbNetRegIO is a simple interface to read and write registers inside your application from anywhere on the network....

r18 - 2009-09-11 - 12:24 by JanMichel

MdcReadoutupgrademeeting

Weekly meeting on MDC readout upgrade Main.BurkhardKolb 08 Sep 2009 Participants: Main.BurkhardKolb, Main.JanMichel, Main.JoernWuestenfeld, Main.KathrinGoeb...

r45 - 2009-09-08 - 13:22 by BurkhardKolb

TrbNetStreamedEventBuilding

Streamed Event Building The name "streamed event building" comes from the fact that inside the network there is no place where we can guarantee to be able to stor...

r9 - 2009-07-09 - 12:49 by JanMichel

AddOns

Main.MichaelTraxler 24 Jun 2009

NEW - 2009-06-24 - 16:56 by MichaelTraxler

TestsinCave

Tests in the Cave Test with internal CMS * yellow: CMS * purple: Token In * green: Token Out * red: Analog Out Main.KathrinGoebel 19 Jun 2009

r2 - 2009-06-19 - 17:30 by KathrinGoebel

TrbNetIPUChannel

IPU Data Channel Data Format The request to start readout of the data of a specific event is the same as the trigger information delivered on the LVL1 trigger ch...

r4 - 2009-05-28 - 15:18 by JanMichel

HowtoAddNewModule

In the base dir, change the files Makefile.am and configure.in make the new subdir and copy a Makefile.am from a different subdir (not from the main dir!!!). Edit...

r3 - 2009-03-25 - 15:42 by SergeyYurevich

VHDLConstraints

Information on using VHDL Constraints Lattice constraints Constraints for Lattice FPGAs should be located in a separate LPF file, especially if these constraints...

r7 - 2009-02-17 - 12:44 by MichaelBoehmer

EventBuilderSoftware

r15 - 2009-02-04 - 11:50 by SergeyYurevich

HPTDCcalibration

Main.KrzysztofKorcyl 19 Sep 2005 RPC board CALIBRATION Calibration, according to NASA definition, is the process of collecting instrument characterization infor...

NEW - 2009-01-28 - 16:53 by MichaelTraxler

RichFEEandDAQUpgrade

First light : ) Despite the fact the the description below is really outdated, I can pronounce the first really important step from connecting the new RICH ADCM t...

r3 - 2008-12-22 - 17:51 by MichaelBoehmer

NewTriggerBusToDo

Not the official milestones, but some pragmatic steps: Simulations VHDL simulation done by Ingo. First important step is to have a running chain with 2 dummy APL...

r8 - 2008-12-22 - 13:29 by JanMichel

ModuleReleases

Stable releases of modules, corresponding CVS tags and description of each release are given in a table below: (How to checkout branch: cvs checkout r stab_oct07...

r2 - 2008-12-11 - 17:57 by SergeyYurevich

TrbNetAddresses

Network Addresses Each network member needs an unique 16Bit address. A network member is not necessarily equal to some piece of hardware: A normal TRB2 board has ...

r9 - 2008-10-28 - 12:02 by JanMichel

DescriptionOfEtrax

spi for Tof This site is still waiting for Marek :)

r5 - 2008-10-24 - 10:42 by RadekTrebacz

HadesRawDataFormat

HADES raw data format document is signed up to version 1.3 Purpose This document describes the raw data format of the HADES data acquisition system. All Rea...

r8 - 2008-10-02 - 12:01 by MichaelBoehmer

DaqUpgradeSubEventAdvancedDebugBlock

Main goal The Advanced Subevent Debug Block (ASDB) is being proposed in strict accordance to the existing HADES subevent header structure. It enhances the feature...

r2 - 2008-10-02 - 12:00 by MichaelBoehmer

DaqUpgradeSubEventDebugBlock

Structure The main idea is to include additional debug information inside the data block (either send by TRBNet or on the classical way). This information should ...

r4 - 2008-08-21 - 21:10 by MichaelTraxler

DescriptionOfFPGA

A VIRTEX4 LX40 FPGA is used on the TRBv2. FPGA registers r/w adress bits r 0 31 26 not used ADO_LV 25 0 r 1 31 lvl2 busy 30:lvl1_fif...

r8 - 2008-07-23 - 17:14 by MarekPalka

VMEAddressesForEveryGivenRegister

VME addresses for every given register This is the official source of information. Address Description comments offset (hex) ...

r2 - 2008-06-25 - 17:32 by MichaelTraxler

MDC-Optical_endpoint_History

I propose to use the following components: * SPFEIM100_G optical transceiver from Infineon (I ordered 30 of them 2007 01 29 ) * a 100 300Mbits/s SERDES. In...

r6 - 2008-06-06 - 21:05 by AttilioTarantola

TrbNetOnewire

Trb Net Onewire interface This entity provides a very simple 1 wire master to read out the id of a 1 wire device. It does not support busses with more than one de...

r2 - 2008-04-03 - 17:41 by JanMichel

TrbNetIOBUF

Overview The TrbNetIOBUF is the basic element which controls the connection between the media layer (after de multiplexing of the individual channels) and the Fan...

r12 - 2008-03-25 - 13:19 by JanMichel

TrbNetFifo

Overview Wrapper entity for various fifos. The design files for the different fpgas can also be found in the cvs, as xco configuration files for the xilinx corege...

r4 - 2008-03-14 - 23:42 by JanMichel

TrbNetStreamingAPI

Trbnet Streaming API A streaming API allows an application to be inserted into the data stream. There it can fullfill two different tasks: It can simply preproces...

r3 - 2008-03-14 - 23:09 by JanMichel

TRBProgressReports

Radek TIPS about DAQ, kernel, etc. manual about DAQ readout scripts TRBvIIHowTo for trb v2 AnaSimMay07 1 Quantum Mechanic very well ...

r87 - 2008-03-11 - 10:35 by AttilioTarantola

CN2008_02_Pictures

Main.MichaelTraxler 06 Mar 2008 * Front side: * Back side:

NEW - 2008-03-06 - 21:42 by MichaelTraxler

ModulReleases

Stable releases of modules, corresponding CVS tags and description of each release are given in a table below: Module CVS tag comment hadaq ...

NEW - 2008-02-22 - 12:32 by SergeyYurevich

EventBuilderPermormance01

Event Builder Performance Conditions: * 90 subsystems * I used TOF 0, TOF 1, TOF 2 and TOF 4 VME CPUs. 23/22 daq_rdosoft processes per CPU. * Water mark ...

NEW - 2008-02-08 - 19:21 by SergeyYurevich

TrbNetConfiguration

Network configuration A lot of parameters cn be set using the generics in each top entity. Nevertheless, some of these have to be common for all network devices. ...

r3 - 2008-01-22 - 15:17 by JanMichel

TRBvIIHowTo

How to use the TRBv2 * How to start * How to start readout * DescriptionOfEtrax * DescriptionOfFPGA * DescriptionOfTDC Main.MarekPalka 27 Jun 2...

r8 - 2008-01-07 - 10:40 by RadekTrebacz

NewTriggerBusNetwork

Overview The network protocol is the most critical part of the complete concept. It should match the requirements (low latency), but should be flexible on the o...

r19 - 2007-12-28 - 17:38 by JanMichel

NewTriggerBusCom

Please make a block diagram Please add schematics here... Bugs The trigger bus jumpers are not correctly pulled: To be a DTU, the data pin must be a pull up, not...

r5 - 2007-12-28 - 17:32 by JanMichel

TrbNetEndpoints

Endpoints There are some ready to use endpoints. These endpoints are named accordingly to their kind and number of interfaces: For example "trb_net16_endpoint_0_t...

NEW - 2007-12-28 - 17:04 by JanMichel

TrbNetInterfaces

Interfaces The TRB Endpoints are all using the same interfaces. There is a media independent interface (MII) on the network side. On the application side of the e...

r2 - 2007-12-28 - 16:33 by JanMichel

TrbNetIOMultiplexer

Overview The multiplexer, which has more than one port on the internal side, and one port only on the media side. Signal description Media direction port Inter...

r3 - 2007-12-28 - 16:15 by JanMichel

TrbNetOBUF

Overview The TrbNetOBUF is controlling what data content is leaving the hub. Signal description Media direction port (similar as described in NewTriggerBusMedia...

r3 - 2007-11-27 - 13:18 by JanMichel

TrbNetIBUF

Overview The TrbNetIBUF is buffering the data coming from the media. All word which are offered by the media must be read, otherwise something is completly wrong ...

r6 - 2007-11-27 - 13:17 by JanMichel

TrbNetFiles

TRBNet Files This is a list of files found in the cvs. The optical link is missing at the moment. Low level parts Fifos $ trb_net_fifo: A standard fifo entit...

r5 - 2007-11-27 - 12:34 by JanMichel

GeneralDescription

How to start 1. Below you can find images for TRB. If you cannot find your image, mail to Radek(rtrebacz #64;gmail.com). Lets include information about NFS ser...

r11 - 2007-11-27 - 10:26 by RadekTrebacz

LinuxVMECPUInstallation

The Concurrent VP32x/02x VME CPUs boot via PXE. To get this working you have to enable booting via PXE in the BIOS of the CPU. Additionally, one should enable the...

r8 - 2007-08-15 - 16:13 by MichaelTraxler

RpcDataStructure

TRBv1 structure Word: Contents: Description: # RPC Header 1 size Length of whole subevent 2 0x3001 ...

r11 - 2007-08-01 - 11:29 by MichaelTraxler

DescriptionOfTDC

TDC is connected with FPGA thru two interfaces: * JTAG * Parallel JTAG interface It is used for programming status register and control register of TDC's...

r3 - 2007-07-24 - 15:43 by MarekPalka

VHDLCodeInformation

General Information about VHDL Code 1 Recommendations for a common VHDL code style 1 Using VHDL Constraints Main.JanMichel 03 Jul 2007

NEW - 2007-07-03 - 13:45 by JanMichel

MarekPalka

Main.MarekPalka 02 Mar 2007 MarekPalka Main tasks are: * Crosstalk(CrossTalk) and nonlinearity TDC calibration started , * Implement internal registers ...

r5 - 2007-06-27 - 17:56 by MarekPalka

SoftwareHowToDataAccessBeamtimeAprMay2006

connect_res start/stop connect_res Michael fixed connect_res which was crashing when a connection to the Event Server (hadeb06) was lost. Now connect_res will...

r6 - 2007-04-22 - 19:13 by SergeyYurevich

DataAccessSchemeBeamtimeAprMay07

Data Access Scheme for Beamtime Apr 2007 The following picture illustrates the data flow for the april 2007 beamtime. This scheme on one hand provides access for...

r11 - 2007-04-12 - 15:16 by SergeyYurevich

TofParams

In a nutshell: To remove tof completely from the LVL2 trigger and use tip only as a readout board, change * set g_master_control expr 0x6 $async_mode to...

r4 - 2007-03-29 - 15:51 by IngoFroehlich

RunControlSoundServer

The sound server is a "superdaemon" running on "hadesdaq", as well as on hadc08 and lxhadesdaq Install the sound server: * checkout the "tools" module * as ...

r3 - 2007-03-26 - 15:56 by IngoFroehlich

ViewLogic

Graphical design system for logic designs. Main.MichaelBoehmer 20 Mar 2007

NEW - 2007-03-20 - 14:53 by MichaelBoehmer

TRBBoardStatus

Here the TRB Version 1 are listed where they are used and their current status de etrax where status additional information last update 001 cracow Ok ...

r16 - 2007-03-14 - 09:31 by MarekPalka

TrbNetPriorityArbiter

Overview The TrbNetPriorityArbiter takes an INPUT_IN pattern and generate an RESULT_OUT pattern with only one bit enabled. Fixed priority is possible as well as r...

NEW - 2007-02-14 - 13:54 by IngoFroehlich

NewProtocolEtraxToFPGA

Main.MarekPalka 02 Nov 2006 Port C7 0 is used as an output of Etrax and port C15 8 is used as input. With first trigger etrax sends what kind of action(M) i...

r7 - 2007-02-09 - 14:29 by MarekPalka

NewProtocolEtraxToDSP

The access to the DSP goes always via the FPGA, in particular the boot strap pins are driven by the FPGA, and this is very important. I suggest a number of regist...

NEW - 2007-01-29 - 12:09 by IngoFroehlich

NewTriggerBusNetworkDescr

HDR F1 Source address F2 Target address F3 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 LAY VERS SEQNR DTYPE ...

r3 - 2006-12-08 - 16:47 by IngoFroehlich

CrossTalk

Main.MarekPalka 16 Nov 2006 On the picture below is presented crosstalk measured on 2 channels. On one channel is pulse which is about 55ns wide. Disturbing chan...

r4 - 2006-11-20 - 09:46 by MarekPalka

MatchingUnitCode

Here is the code (in the attachment): matching.c and trigger.c are the most interesting files I think.... Main.MichaelTraxler 16 Jun 2005

r3 - 2006-10-12 - 17:21 by MichaelTraxler

SpeedImprovement

Current speed: 1000 Event/sec goal: 5000 Event/sec check waitstates waitstates application: Results: * speed the application with empty loop (it ...

r5 - 2006-09-22 - 13:44 by RadekTrebacz

AcromagModule

Driver installation for the Acromag PMC module * Download the driver software from acromag (or ask Ingo) * Go to pmcdx501/devdx501/ and #define KERNEL_DBG_O...

r2 - 2006-08-17 - 14:00 by IngoFroehlich

LvmeForConcurrent

Porting the LVME library to Concurrent VME CPU Notes Modules in Test Crate $ SAM: 0x33300000 $ CAEN: 0xeeee0000 $ DTU: 0x44000000 ToDo * Remove D8...

r3 - 2006-08-17 - 13:55 by IngoFroehlich

EtraxEPICSHowTo

Changes needed to compile EPICS environment: set environment: . init_env go to the directory: cd ~/devboard work_2.4/apps/epics/base 3.14.8.2 edit ./configure...

r9 - 2006-07-21 - 11:39 by MichaelTraxler

TRBUseDocumentation

Main.MichaelTraxler 22 Nov 2005 CPLD on board configuration The usage of CPLD is involved with SWITCH2 and also with register in FPGA. Vi this CPLD we can progra...

r2 - 2006-07-14 - 15:24 by MarekPalka

CypressPart

Main.MarekPalka 29 May 2006 Cypress registers

NEW - 2006-05-29 - 14:10 by MarekPalka

JamProgramming

Main.MarekPalka 29 May 2006 How to programm Cypress jam p0xb5200000 aCONFIGURE_DEVICE cy_top.stp Programm board with base 0xb. rw w 0xb5200004 90 for Cypress ...

NEW - 2006-05-29 - 14:09 by MarekPalka

XilinxPart

Main.MarekPalka 29 May 2006 Xilinx registers Address 0x0: bits 7 6 5 4 3 2 1 0 TDO of jtag port CY_config_done pin status ...

NEW - 2006-05-29 - 14:00 by MarekPalka

MatchingUnitV2

Main.MarekPalka 29 May 2006 * XilinxPart * CypressPart * JamProgramming

NEW - 2006-05-29 - 13:49 by MarekPalka

MatchingUnitExperts

## README ## $Source: /var/www/hades wiki.gsi.de/data/DaqSlowControl/MatchingUnitExperts.txt,v $ ## $Id: MatchingUnitExperts.txt,v 1.6 2006/04/21 08:45:52 HadesDa...

r6 - 2006-04-21 - 10:45 by HadesDaq

RichCratesRcPrcSetup

Main.MichaelTraxler 02 Feb 2006 * Overview of RICH:

NEW - 2006-02-02 - 19:04 by MichaelTraxler

VMEHandbookScan

VME info Main.MichaelTraxler 27 Jan 2006 * VME_Handbook_Pindefinition.pdf: Pins on the VME backplane * VME_Handbook_Interrupts.pdf: Interrupts * VME_...

NEW - 2006-01-27 - 12:18 by MichaelTraxler

MatchingUnitDataFormat

/* Version: $Source: /var/www/hades wiki.gsi.de/data/DaqSlowControl/MatchingUnitDataFormat.txt,v $ $Id: MatchingUnitDataFormat.txt,v 1.7 2006/01/23 13:28:19 Micha...

r7 - 2006-01-23 - 14:28 by MichaelTraxler

MatchingUnitAlgorithm

What the MU does in words.... One comment about downscaling and triggered flag in the MU data These flags are not correlated. The MU always (for every event) det...

r6 - 2006-01-18 - 16:31 by MartinJurkovic

SmokedTRB

The smoked TRB (Serial No. 5) is in repair. After removing the DC/DC converters (48V, 2,5V, 3.0V) there is no short circuit anymore and the ETRAX is working again...

r3 - 2005-11-09 - 12:12 by MichaelTraxler

TofCalibration

The TIP has to provide theta and phi of lepton candidates for the Matching Unit. Therefore it needes the calibration parameters of the TOF detector. There is no a...

r2 - 2005-09-16 - 22:27 by HadesDaq

RichHitsObservation

To observe the hits on the Rich detector one has to type: 1 ssh hrich@lxi003 1 bash ; daq_sniff h lxhadesdaq richmonqt Main.MichaelTraxler 14 Sep ...

NEW - 2005-09-14 - 20:06 by MichaelTraxler

CaenTDC32

CAEN TDC/ADC 32 channels Current (15.04.2005) firmware version 4.06 Way to find out version: E7_25:tof1:/hades/usr/hades/aug04/slow $ rw_16 r 50001000 read: 000...

r2 - 2005-08-25 - 17:25 by SimonLang

DaqSlowControl

NEW - 2005-08-25 - 15:47 by SimonLang

TofSetup

This is the page where all TOF modules are described If you make changes (in particular TOF4) please update this page TIP modules Module Label Description ...

r11 - 2005-08-08 - 12:27 by IngoFroehlich

TofBugs

TIP shows permanent bus errors If the error log shows messages like this: e7_21 tipctrl 26 : tof2tip: Bus Error Workaround: Please stop DAQ, close hadaq and re...

r3 - 2005-08-05 - 11:46 by HadesDaq

TofDebugging

(NL) is a number of line counter tip_readout (DSP1) tipdebug sniff1 tof1tip (NL) CT:5 X:6100 MC:6407 MS:20040 1:1445d2 1T:0 1P: 3 2 :8b6c1 2 :b8f0e CT: which ...

r2 - 2005-08-05 - 11:45 by HadesDaq

TipSubeventFormat

TDC header (defined by CAEN) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4...

r6 - 2005-08-05 - 11:43 by HadesDaq

RamEthernet

There are two applications: ram2eth file:///misc/hadaq/cvsroot/rpctrbetrax/eth2file response for sending triggers reading RAM1, RAM2 sending this data v...

r7 - 2005-07-14 - 14:19 by RadekTrebacz

RichAdjustThresholds

Adjust Thresholds cat s3r0p6.dat perl ne 'next if (/^#/); ($a, $b)=$_=~/(\d ) (\d )/; if($b s3r0p6.dat_all_1023 postion: sep03/slow/race/adjust_thresholds_fil...

r2 - 2005-07-13 - 15:18 by MichaelTraxler

MotherboardDACs

On the RPC Motherboard, there are 8 DACs from Linear Technologies: LTC2600 Manual is attached. Main.MichaelTraxler 13 Jul 2005

NEW - 2005-07-13 - 11:58 by MichaelTraxler

RunControlTasks

Status and "to do" list for RunControl * error reporting in async record? report via alarm status, how to check? * snc compiler works, but no runtime If cas...

r18 - 2005-06-02 - 14:38 by SimonLang

RunControlStatusSummary

Summary of current status in RunControl Frontend Control/Monitoring * IOC on LynxOS works reliable * implementation of "blub_lib" interface to IOC done for...

r3 - 2005-06-02 - 14:37 by SimonLang

RunControlStatesNov00

Data Acquisition and Slow Control name of document daqslow.html version 0.3 author M. M nch date 18 07 2000 draft purpose This document proposes a common understa...

r2 - 2005-06-02 - 14:37 by SimonLang

RunControlStates

Some thoughts about init/reset/start/stop In the original definition of the run control states it was well definied what transitions from state to state are possi...

r4 - 2005-06-02 - 14:36 by SimonLang

RunControlMU

The MU has the following features: * always readable register: offset 0x07000000 (0xd7000000) * if you can read from address offset 0x02004000 (0xd200...

r3 - 2005-06-02 - 14:35 by SimonLang

RunControlBrainStorm

Run Control Brain Storming * Call browser windows from MEDM for input into database (like OV NNM WebLauncher) * Writeup and new thoughts on RunControlStates...

r8 - 2005-06-02 - 14:35 by SimonLang

RunControlBetterHardware

Better Hardware for a better Run Control Some thoughts which functions in readout hardware would be nice to have for supporting the run control. Most of the time...

r3 - 2005-06-02 - 14:34 by SimonLang

MatchingUnitSettings

Hello, if you want to change the LVL2 Trigger settings do the following: go to one of the lxi machines (user hadaq): $ ssh hades@lxi016 then go to /u/hades/hades...

r3 - 2005-06-02 - 14:32 by SimonLang

HadesArchivist

HadesArchivist The Archiving tool to save HLD Files on the GSI Tape Storage System Currently for archiving HLD files we are using a Perl script which runs as a da...

NEW - 2005-03-16 - 10:18 by SimonLang

WebSearchAdvanced

NEW - 2004-01-18 - 11:52 by PeterThoeny

WebRss

Foswiki's DaqSlowControl web /view/DaqSlowControl The DaqSlowControl web of TWiki. TWiki is a Web Based Collaboration Platform for the Corporate World.

r2 - 2003-01-30 - 09:15 by PeterThoeny

WebIndex