Results from DaqSlowControl web retrieved at 17:40 (Local)

AcromagModule
Driver installation for the Acromag PMC module * Download the driver software from acromag (or ask Ingo) * Go to pmcdx501/devdx501/ and #define KERNEL_DBG_O...
AddOns
Main.MichaelTraxler 24 Jun 2009
BLRpictures
Main.PabloCabanelas 31 Jan 2011 * BLR Front view: * BLR Back view:
BitFlips
The plot shows the bit distribution (11 bits of the dataword) vs MB. If there is a hot spot of a read stripe (like in this example), it means that a MB deliver al...
BookkeepingPadiwa
Padiwa and PadiwaAmps1 bookkeeping Padiwa PadiwaAMPS Serial Number current location Patch A Patch B FPGA design comment 1 D Lab ECAL ...
BookkeepingTrb3
* This list is now located on the TRB3 webpage. Please edit it there!* Serial Numbercurrent LocationFlash with 0RErrors, Bugs, Special Features 1 Frankfurt X p...
BuildHadaqTestSystem
Howto build a Hadaq test system More or less, enter the following commands. Adjust the path names to your needs. At the top of semaphore.c is a union inside #ifde...
CAEN1527NetworkAndStatusWatchdog
__ Introduction On Request of the HADES MDC group a local EPICS based watchdog unit is built to 1 set and get via network as EPICS client the values of an ext...
CN2008_02_Pictures
Main.MichaelTraxler 06 Mar 2008 * Front side: * Back side:
CaenTDC32
CAEN TDC/ADC 32 channels Current (15.04.2005) firmware version 4.06 Way to find out version: E7_25:tof1:/hades/usr/hades/aug04/slow $ rw_16 r 50001000 read: 000...
CalibratinData
Check if each MBO deliver the right amount of data and if there are TDCs (channel) missing. * calibration: * calibration slope: The calibration slope...
CodeRepositoriesCVS
CVS Basics Here are some most often used CVS commands. After you got your local copy of a module, all the CVS commands related to the module you should do insi...
CommissioningLogBook
Up to date information about all ongoing and planned work Please update this list regularly! this will help all of us to keep a better overview. Logbook * 12 ...
CommonStatusRegister
Common Status Register All network devices have one (or more) 32 Bit status registers. These registers will be read out for example once each second using TRBNet....
ComputerNames
Computer Names available name purpose location comment status hades14 used by Ingo's laptop hades15 ...
CriteriaToProofTheFEE
Here it follows a list of steps which have to be performed in order to poof the electronics on the MDC: 1) Acquire a file (.hld) and make its analysis as describe...
CrossTalk
Main.MarekPalka 16 Nov 2006 On the picture below is presented crosstalk measured on 2 channels. On one channel is pulse which is about 55ns wide. Disturbing chan...
CypressPart
Main.MarekPalka 29 May 2006 Cypress registers
DAQManualShort
A short version of the DAQ manual. This is a working version of the document, if you see some changes in the startup procedure feel free to update this page. To s...
DAQPeopleBusyTime
Days on which you are not available year 2011 Person Jun Jul Aug Sep Oct Nov Dec Jan Ingo Jan ...
DAQUpgradeInstallation
DAQ Upgrade Installation of TRB, AddOn, Network... Trigger Distribution * RPC: One PECL LVDS converter on each sector * Shower: Same distributor board a...
DAQUpgradeLogbook
Open Tasks Tasks currently on our agenda: * Remove obsolete cables still a topic ; ) (Everybody who is familiar with the old setup) * Install temperature...
DAQUpgradeTOFAddOn
TOF AddOn2 Manual TOF FEE 128 channel TRB AddOn module for HADES, original document: TRB TOF AddOn.pdf. The design of TOF FEE 128 channel Time over Threshold (ToT...
DCSNetworkSwitchConfigurationTripleVlanSplitDLinkDGS1510
__ Introduction The objective is to configure a network switch, D Link DGS 1510 28 L3 switch with 24 RJ45 4 SFP ports to provide 3 independent access blocks of...
DCSSetupJul2018
__ Setup GIT Git repository at $productionGit Hosts and their tasks host tasks repository * st_xxx.cmd * lxhadeb06 LV, temp, GAS, ... p...
DTU_VHDL_Tiago
DTU in VHDL from Tiago For debugging of the DTU check the DtuDebugRegisters page. RPC DTU debug registers LVL1 DTU_DEBUG_11 DTU_DEBUG_12 DTU_DEBUG_13 = x"00...
DTU_VME_Problems_Concurrent
Michael Bhmer realized that the DTU/CTU Lattice Desgin, which handles the VME bus, was not working correctly, which only occured when using the Concurrent VME CPU...
DaqCheckList
Checklist of things to be checked before data taking in a beamtime Print this page and fill out gaps and give it to the technical coordinator Date: issue d...
DaqMeetingAgendaJuly2009
Agenda for the DAQ Electronics Integration Meeting data format for the different subsystems * news since the Sesimbra meeting (Michael B., Attilio, Marcin?, M...
DaqMeetingMinutes2006-10-18
Executive Summary: The DAQ Upgrade projects are on their way TRBv2 PCB layout finished / order on the way MDC Add On: schematics finished and discussed E...
DaqNetwork
The DAQ Network Concept Overview $ NewTriggerBusConcept : The concept for a new trigger bus DAQ Network Modules $ NewTriggerBusCom : The hadcom module ...
DaqPeopleAndMeetings
DAQ People * DAQPeopleBusyTime * DaqPhoneList * Slow Control Group DAQ Meeting Minutes * 2005 05 24 (RPC): Minutes from the RPC Meeting * 2006 10 ...
DaqProblems
When you have DAQ problems, please follow this procedure Checks: 1 Are still events written to tape? 1 Is one crate turned off? (use slow control window to...
DaqTodoList
Short term To Do List DAQ Documentation Prio. Topic Status Person 5 In depth documentation of CTS settings behaviour not started ...
DaqUpgrade
The Upgrade of the HADES DAQ * DaqUpgradeOverview * DaqNetwork * DaqUpgradeGbE * DaqUpgradeMDCOverview * DaqUpgradeRICHOverview * DAQUpgradeTOFA...
DaqUpgradeGbE
Main.GrzegorzKorcyl 06 May 2009 Overview: Optical hub is an TRBv2 addon board which extends the main board with routing and communication features. The power of ...
DaqUpgradeMAPSOverview
Main.ChristophSchrader 20 Mar 2007 Overview * MAPS_BLOCK_SCHEMA.pdf: The illustration shows a block diagram of the typical configuration for the MAPS readout de...
DaqUpgradeMDCOverview
Weekly MDC Readout Upgrade Meeting The protocol of the meetings: MdcReadoutupgrademeeting Readout via OEP and MDC Optical AddOn MDC OEP testing, mounting, com...
DaqUpgradeOverview
DAQ Upgrade This document gives an overview of why and how we want to upgrade our HADES DAQ/Trigger System. The upgrade at a glance : ) . Motivation for an Upgr...
DaqUpgradeRICHOverview
RICH readout structure General description of the system RICH modules Module descriptions APV25S1 information Details on APV25S1 Manual Main.MichaelBoehmer ...
DaqUpgradeSubEventAdvancedDebugBlock
Main goal The Advanced Subevent Debug Block (ASDB) is being proposed in strict accordance to the existing HADES subevent header structure. It enhances the feature...
DaqUpgradeSubEventDebugBlock
Structure The main idea is to include additional debug information inside the data block (either send by TRBNet or on the classical way). This information should ...
DataAccessSchemeBeamtimeAprMay07
Data Access Scheme for Beamtime Apr 2007 The following picture illustrates the data flow for the april 2007 beamtime. This scheme on one hand provides access for...
DataStructure
Main.AttilioTarantola 03 May 2009 Here follows the new data structure for MDC readout(OEPB). In the following picture (taken from Jan's talk, IKF Seminar 30.04.0...
DataTestLogBook
All tables can be edited directly. Use the "Edit table" button underneath each table! Logs for all tests Summary Table Summary table of all tests done Plane ...
DatawordOutput
Main.AttilioTarantola 04 Jun 2009 Here one can find few dataword samples: Calibration: * out_cal_1_long: calibration data from 1 long Motherboard, all TDCs ena...
DcsScratch
__ Introduction Setup Repositories * git * hosted at https://git.gsi.de * at * https://git.gsi.de/HADES/DCS/EPICS Elements Server EPICS IO...
DebugLists
Main.AttilioTarantola 08 Jan 2009 For each OEPB we should monitor the following information: State Machines states (13 15 entities. 15 registers 8bits each). ...
DescriptionOfEtrax
spi for Tof This site is still waiting for Marek :)
DescriptionOfFPGA
A VIRTEX4 LX40 FPGA is used on the TRBv2. FPGA registers r/w adress bits r 0 31 26 not used ADO_LV 25 0 r 1 31 lvl2 busy 30:lvl1_fif...
DescriptionOfTDC
TDC is connected with FPGA thru two interfaces: * JTAG * Parallel JTAG interface It is used for programming status register and control register of TDC's...
DetectorAndElectronicsConferences
Some electronics, DAQ and Detector related conferences we might want to have some contributions at. Date Description Deadline 23.06.13 27.06.13 Anim...
DetectorControlSystem
Detector Control System (a.k.a Slow Control) !! mainly outdated information, has to be updated !! Background Informations The Detector Control System of the H...
DevBoardPatches
List of patches compiled by Marcin on 06.05.2005 Error list in order of tracing them: 1 RESET is output from ETRAX 1 MRESET is input to ETRAX (place manual ...
DeviceDriverIop
Main.RadekTrebacz 23 Oct 2006 Assembler code: I/O test The original file with headers is in hadaq@hadeb05:~/soft/devboard fs_32v2/os/linux 2.6/arch/cris/arch v3...
DockerCaenDT1470IocArchiverGuiSetup
__ Introduction Issue of this project is to get a docker based EPICS system with: * EPICS IOC connecting to an DT1470ET device * CAENs DT/N147x family ...
DtuDebugRegisters
Here i will start writing info on the DTU debug registers. Back to TriggerDistribution. Main.TiagoPerez 12 Nov 2005
EmbeddedLinuxDev
Info * Where to find * Etrax FS fimage for flashing: * hadaq@depc187:/home/hadaq/etrax_soft/etrax_fs/devboard R2_20/ * Etrax FS fimage for ...
EtraxEPICSHowTo
Changes needed to compile EPICS environment: set environment: . init_env go to the directory: cd ~/devboard work_2.4/apps/epics/base 3.14.8.2 edit ./configure...
EtraxFSDev1Errors
Things we learned from Etrax_FS_Dev1 1 A Ceramic Capacitor (100V) on 48V is missing (100nF). 1 Take care of the LEDs. They are not correct on the ETRAX_FS_D...
EtraxMcmControl
How to use boards with etrax mcm This boards are accessable at GSI under etrax201 etrax248. How to login Only via telnet: telnet etrax2xx, where xx=01 48 There ...
EtraxTRBInterface
Interface between Etrax and FPGA on TRB ("TrbNet edition") Interface The interface between Etrax and FPGA on the TRB2 uses 2 data ports (Port B and C) of the Etr...
EventBuilder
GeneralInformation general information about event builder machines, services running on those machines and so on. EventBuilderDevelopment information and docum...
EventBuilder2012
Status of eventbuilder for beamtime 2012 Here documentation of setup and changes Eventbuilder machines Hardware lxhadesdaq central machine lxhadeb01 Previous ...
EventBuilder2014
Eventbuilder status in 2014 here some description of the actual setup before beamtimes Jul14 and Aug14 Eventbuilder servers Hardware lxhadesdaq Central server ...
EventBuilderDabc
Eventbuilder and TRBnet plugin for DABC Introduction The future application for trbnet hardware for FAIR detector test beams (e.g. CBM, PANDA, R3B) requires to i...
EventBuilderDevelopment
Event Builder Development Short Intro The aim of the Event Builder (EB) is to receive subevents from subsystems and to build a complete event out of them. EB con...
EventBuilderDreamplug
Eventbuilder on Dreamplug Introduction This page collects experiences with hadaq eventbuilder software installed on dreamplug mini pcs System description here o...
EventBuilderPermormance01
Event Builder Performance Conditions: * 90 subsystems * I used TOF 0, TOF 1, TOF 2 and TOF 4 VME CPUs. 23/22 daq_rdosoft processes per CPU. * Water mark ...
EventBuilderRunControl
Run Control of Multiple Event Builders Introduction The aim of the Run Control of the Event Builders is to have a central control and monitoring system for all E...
EventBuilderTest
Table of contents: Tests with 90 subsystems: Test 1 with 90 subsystems (no writing to hard disk, no rfio) The test system: TOF 0, TOF 1, TOF 2, TOF 4 VME CPUs ...
FEETestLogBook
* 04.02.2011 * Start test in cave (AT) .... Main.AttilioTarantola 03 Feb 2011
FeeTests
1) Within February 2011: Test the FEE on P3S2 and P4S2 (Chambers which are on the floor of the cave (03.02.2011). Next week, on Monday (06.02) Torsten will prep...
FlashProgramming
Main.AttilioTarantola 26 Apr 2009 The OEPB flash programming over ETRAX. 1)ETRAX takes OEPB configuration file. 2)ETRAX does block write with increasing addresses...
FlashTool
To make TRB working: flashTool.tar: Tool to flash the image to TRB Content of README file: To flash this image: 1. set SW1 switch on the board to A, 2. ty...
FsJamUsing
To program FPGA via jam you should: 1. copy your file.stapl to: hadeb05.gsi.de:/var/diskless/etrax_fs or cerber.if.uj.edu.pl:/home/trebacz/axis_nfs_fs in Craco...
GeneralDaqOperation
General DAQ All what is written below should be done on hadesdaq computer. Start acquisition Button "Blue_Arrow_Down" "Fast DAQ start". After a successfull ctu ...
GeneralDescription
How to start 1. Below you can find images for TRB. If you cannot find your image, mail to Radek(rtrebacz #64;gmail.com). Lets include information about NFS ser...
GeneralInformation
Table of contents: hadeb05 Due to JUMBO frames hadeb05 can stop receiving DHCP discovers from TRBs. Solution: * ifconfig eth0 down * modprobe r sk98lin;...
HPTDCcalibration
Main.KrzysztofKorcyl 19 Sep 2005 RPC board CALIBRATION Calibration, according to NASA definition, is the process of collecting instrument characterization infor...
HadTempSens
Giacomo, please put in here all the info you have about your Temp Sense project. Main.MichaelTraxler 19 Oct 2006 Here you will find the informations about the...
Hadcon2DreamplugSystems
__ Introduction Systems \" edit)"}% Dreamplug/HadCon2 Combinations * defined in startupProcedures and matched by the IOC code * FTDI ID via: $ sbin/...
HadesArchivist
HadesArchivist The Archiving tool to save HLD Files on the GSI Tape Storage System Currently for archiving HLD files we are using a Perl script which runs as a da...
HadesDaqDocumentation
Here we collect documentation for the Hades DAQ. Global DAQ issues 1 GeneralDaqOperation 1 DaqCheckList ( things which should be checked before a beamtime)...
HadesHadcon2Modules
__ Introduction Main.PeterZumbruch 28 Nov 2012
HadesIoBox
HADES I/O Box Introduction Based upon the HadCon2 multi I/O board, the DreamPlug Plug Computer, and the 1 wire based ADC board OwAdc a small, slim, multi ana...
HadesNetworkCountingHouse
HADES Network Configuration in Counting House Network Switches After a discussion with Mathias Mnch today (2006 05 18) we can assume the following: * The mai...
HadesRawDataFormat
HADES raw data format document is signed up to version 1.3 Purpose This document describes the raw data format of the HADES data acquisition system. All Rea...
HardwareTest
MDC Upgrade: MDC Optical Endpoint Hardware test Here we collect the documents relative hardware measurement Chip's temperatures Main.AttilioTarantola and Ya...
HowStartDAQ
"Nice" version of DAQ System: List of files needed for starting DAQ on TRB: You have to log into the board and program FPGA: /home/hadaq/FPGA_jam_stapl.sh Log ...
HowToPrepareServerForTrb
This page tries to explain how to prepare server to handle trb version2. assumptions: 1. server has ethernet interface eth0 with IP: 192.168.0.1 1. trb has...
HowToRunMDCDaq
Main.AttilioTarantola 05 Aug 2008 The software configures and takes data from 10 buses. By default all 10 buses are enabled. After you loaded the firmware, the ch...
HowToRuntheDaq
Main.AttilioTarantola 23 Jul 2009 Configuration parameters for TDCs: * config_mdc_fee.txt: configuration parameters for MDC FEE
HowtoAddNewModule
In the base dir, change the files Makefile.am and configure.in make the new subdir and copy a Makefile.am from a different subdir (not from the main dir!!!). Edit...
IcingaMonitor
ICINGA General setup Icinga is a system and network monitoring application. It watches hosts and services that you specify, alerting you when things go bad and w...
InformationForOEPMounting
Mounting new Cables and OEP to MDC In this file you can find all information you need before working on the MDC upgrade: * MboDboOnChamber.pdf: INFORMATION FOR...
InstallationTimeTable
MDC Upgrade Installation Task Plane 1 Plane 2 Plane 3/4 Sector 1 Plane 3/4 Sector 2 Plane 3/4 Sector 3 Plane 3/4 Sector 4 Plane 3/...
JamProgramming
Main.MarekPalka 29 May 2006 How to programm Cypress jam p0xb5200000 aCONFIGURE_DEVICE cy_top.stp Programm board with base 0xb. rw w 0xb5200004 90 for Cypress ...
LinuxVMECPU
Info about the Linux VME CPUs * LinuxVMECPUInstallation * List of Concurrent VME CPUs and their MAC addresses * AcromagModule Technical Documents * S...
LinuxVMECPUInstallation
The Concurrent VP32x/02x VME CPUs boot via PXE. To get this working you have to enable booting via PXE in the BIOS of the CPU. Additionally, one should enable the...
LinuxVMECPUList
List of Concurrent VME CPUs and their MAC addresses DNS names are always: hadcXX, where XX is the number down in the table. No location means: At GSI on Michaels ...
ListOfAllSpareMBBoards
Summary Table: new boards (assembled in 2011) * Tested in July 2014 by C.Wendisch Kathrin Bismark (Sommerstudent) * calibration files md14...hld (if avail...
ListOfBoards
List of Boards This should be a complete list of all used boards in the HADES DAQ context. For the running system, such a list is needed to assign the network add...
ListOfBoardsEtraxMCM
List of Boards sub topic Etrax MCM Etrax MCM boards ( HadCon / HadShoPoMo ) Serial Number Experiment Location Network Address Notes Kernel time ...
Lvl1Trigger
LVL1 trigger improvements/changes Main.WolfgangKoenig 30 Mar 2007
LvmeForConcurrent
Porting the LVME library to Concurrent VME CPU Notes Modules in Test Crate $ SAM: 0x33300000 $ CAEN: 0xeeee0000 $ DTU: 0x44000000 ToDo * Remove D8...
MBBlackList
Olga and Vladimir's list: noisy and inactive channels by 317 day (B0) and 319 day (B1) from Nov'10 data. NOISY: =============== S M Mb Ch Excess =========...
MBTestLab
Main.CahitUgur 17 Mar 2011
MDC-Optical_endpoint_History
I propose to use the following components: * SPFEIM100_G optical transceiver from Infineon (I ordered 30 of them 2007 01 29 ) * a 100 300Mbits/s SERDES. In...
MDCDevelopmentAndTesting
Development and Testing of new Hardware * DatawordOutput Example output for event data * DebugLists monitored signals for debugging * HardwareTest ...
MDCUpgradeInstallation
Installation and Testing of new MDC DAQ components * OEPBasicTests Testing OEPs and first time programming in Lab * InformationForOEPMounting Bookkeepin...
MDCUpgradeLogBook
Up to date information about all ongoing and planned work Please update this list regularly! I think this will help all of us to keep a better overview of the who...
MDCUpgradeOld
Readout Setup v1 : AddOnv1 and other outdated information Rossendorf Dec07 discussion In Rossendorf we had a discussion about the MDC readout project. The Rossen...
MDCUpgradeWorks2010
MDC Upgrade the final phase Meetings The first meeting of this working period will take place on Monday, 4.1.2010 at 10 a.m. in the upper counting house. Plan...
ManualEvtBuildJan05
Emergency Event Building Procedure for Jan05 * Switch to workspace "evtb". * There should be two terminal windows on host "lxhadesdaq", directory "/home/had...
MarekPalka
Main.MarekPalka 02 Mar 2007 MarekPalka Main tasks are: * Crosstalk(CrossTalk) and nonlinearity TDC calibration started , * Implement internal registers ...
MatchingUnit
Matching Unit issues * MatchingUnitAlgorithm (gives some prosa description of the MU algorithm, real docu is still the code trigger.c ) * MatchingUnitSetti...
MatchingUnitAlgorithm
What the MU does in words.... One comment about downscaling and triggered flag in the MU data These flags are not correlated. The MU always (for every event) det...
MatchingUnitCode
Here is the code (in the attachment): matching.c and trigger.c are the most interesting files I think.... Main.MichaelTraxler 16 Jun 2005
MatchingUnitDataFormat
/* Version: $Source: /var/www/hades wiki.gsi.de/data/DaqSlowControl/MatchingUnitDataFormat.txt,v $ $Id: MatchingUnitDataFormat.txt,v 1.7 2006/01/23 13:28:19 Micha...
MatchingUnitExperts
## README ## $Source: /var/www/hades wiki.gsi.de/data/DaqSlowControl/MatchingUnitExperts.txt,v $ ## $Id: MatchingUnitExperts.txt,v 1.6 2006/04/21 08:45:52 HadesDa...
MatchingUnitSettings
Hello, if you want to change the LVL2 Trigger settings do the following: go to one of the lxi machines (user hadaq): $ ssh hades@lxi016 then go to /u/hades/hades...
MatchingUnitV2
Main.MarekPalka 29 May 2006 * XilinxPart * CypressPart * JamProgramming
MdcAddonCooperation
MDC Upgrade: Cooperation with Yanyu Wang Introduction In the HADES DAQ Upgrade project the MDC Upgrade is an essential part. The expected data rates for heavy ...
MdcDcLvl1
Main.AttilioTarantola 13 Feb 2009 MDC DC LVL1 status Board Number where are used status additional information last update 001 GSI M.T.Lab Ok ...
MdcDcLvl2
Main.AttilioTarantola 25 Mar 2009 MDC DC LVL2 status Board Number where are used status additional information last update 001 Frankfurt Uni Ok ...
MdcDocumentation
Documentation of new MDC DAQ * DataStructure Event data structure * HowToRuntheDaq Registers on TDC * SoftwareImplementation Display on General Pur...
MdcReadoutupgrademeeting
Weekly meeting on MDC readout upgrade Main.BurkhardKolb 08 Sep 2009 Participants: Main.BurkhardKolb, Main.JanMichel, Main.JoernWuestenfeld, Main.KathrinGoeb...
ModulReleases
Stable releases of modules, corresponding CVS tags and description of each release are given in a table below: Module CVS tag comment hadaq ...
ModuleReleases
Stable releases of modules, corresponding CVS tags and description of each release are given in a table below: (How to checkout branch: cvs checkout r stab_oct07...
MonitoringDiscussionForum
Main.BorislavMilanovic 31 Jul 2009 Signals I would like to have a complete summary, of what signals need to be monitored at the moment. It is highly necessary, a...
MotherboardDACs
On the RPC Motherboard, there are 8 DACs from Linear Technologies: LTC2600 Manual is attached. Main.MichaelTraxler 13 Jul 2005
Nagios
Nagios DEPRECATED! NOTE: This page is deprecated, since 2011 we use icinga for monitoring See new status on page IcingaMonitor . Main.JoernAdamczewski 09 Feb...
NetworkAddresses
TRBNet Addresses Here are some suggestions for TrbNet Addresses in the final detector setup. They were choosen based on the following premises: * The addresses...
NetworkStructure
Network Structure Our Foundry 10Gbit switch is "divided" into two VLANs: GSI VLAN and our private HADES VLAN. All the TRBs, switches and other network devices in ...
NetworkTests
HADES Network Tests Network related commands Driver related * Get network card info: hwinfo netcard * List loaded modules: lsmod * List all PCI buses ...
NewCTS
CTS and Trigger Logic addresses To all register when accessing vi trbnet add offset A0 CTS Address Bit range Meaning 91 15 downto 0 lvl1 trigger number...
NewProtocolEtraxToDSP
The access to the DSP goes always via the FPGA, in particular the boot strap pins are driven by the FPGA, and this is very important. I suggest a number of regist...
NewProtocolEtraxToFPGA
Main.MarekPalka 02 Nov 2006 Port C7 0 is used as an output of Etrax and port C15 8 is used as input. With first trigger etrax sends what kind of action(M) i...
NewTriggerBusAPI
Overview The main idea of the API (application process interface) is that the user should be able to just read and write data and should not take care about the f...
NewTriggerBusApplicationNotes
Howto implement to OLD_TO_NEW converter The OLD_TO_NEW converter has the old trigger bus as an input, configured in "DTU mode". On the DaqNetwork it has to emulat...
NewTriggerBusCom
Please make a block diagram Please add schematics here... Bugs The trigger bus jumpers are not correctly pulled: To be a DTU, the data pin must be a pull up, not...
NewTriggerBusConcept
Requirements * Cascadable system (a lot of TRBs have to be connected) * Node to Node length at least 100m * Low latency ( There is also the option...
NewTriggerBusMedia
New Trigger Bus Media General IO interface To make the DaqNetwork independent from any media, a standard IO interface is proposed. The interface follows the pri...
NewTriggerBusNetwork
Overview The network protocol is the most critical part of the complete concept. It should match the requirements (low latency), but should be flexible on the o...
NewTriggerBusNetworkDescr
HDR F1 Source address F2 Target address F3 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 LAY VERS SEQNR DTYPE ...
NewTriggerBusToDo
Not the official milestones, but some pragmatic steps: Simulations VHDL simulation done by Ingo. First important step is to have a running chain with 2 dummy APL...
OEPBandMBLogbook
Summary table Sectors Plane at 28.06.2011 (files collected at 18.00h) Plane I Plane II Plane III Plane IV Sectors 1 ...
OEPBasicTests
Initialize new OEPs I. Connect JTAG cable, then power cable I. Check that 1 LED is on I. Program board via JTAG from IspVM. * Program FPGA directly...
OEPNetworkAddresses
Network Addresses of MDC Motherboards/OEPs According to NetworkAddresses, all OEP get TrbNet addresses in the range between 0x2000 to 0x2FFF. The second hex digit...
OEPReadoutTest
How to check data read out from OEP's 1. Login to lxhadesdaq Use vncviewer / krdc to connect to the running vnc session on lxhadesdaq. With vncviewer use vncview...
ObsoleteLogOfCrashes
MT: again after reboot of r2f 35: Jan 28 19:09:45 r2f 35 ./daq_rdotrig 129 : HwTip on 18000000 not found Jan 28 19:09:45 r2f 35 ./daq_rdotrig 129 : Construction o...
OepToDoList
Important things that are necesarry for beamtime 1 Timing issues (initialization phase of MBO) 1 Rotating masks for calibration 1 Trigger interface ( ...
OutdatedPages
List of outdated pages This entry will service as harbour for all outdated and obsolete topics in the DaqSlowControl Web. Contents Main.JanMichel 12 Dec 2009...
ParallelPower
How to set up parallel operation of TDK Lambda power supplies Only power supplies of the same model ( e.g 8V 150A or 50V 30A ) can be connected to increase the ...
PeopleInvolved
Schedule with Doodle: http://www.doodle.com/kih2bwfw4dzyvk8c Main.AttilioTarantola 03 Mar 2011
PowerConsumpionTest
Main.AttilioTarantola 12 Dec 2008 Test conditions: the OEPB configures and acquires data continuosly from TDCs. FOT transmits and receives random data. Cali...
ProposalAndFeaturesTRB3
Layout Proposal (obsolete): * TRB3_layout_proposal1.pdf: Layout proposal * TRB3 updated layout: Key Features * 4 times LFE3 70E(A) 8FN672C for TDC...
QACheckList
Where to find QA check list file Here: * for August 2011: /u/hades qa/Desktop/QA Check List Aug11/QA_check_list_Au_Au_aug2011.pdf (see also attachement) Whe...
QAOperation
Hallo Main.JohannesSiebenson 30 Mar 2012
RPCFEEpictures
Main.PabloCabanelas 31 Jan 2011 * DBO Final Version: * DBO Final Version Block Diagram: * MBO Final Version front: * MBO Final Versi...
RPCMinutesMeeting20050524
Minutes of TRB Meeting 2005 05 31 Attendees: Wolfgang Koenig, Marcin Kajetanowicz, Ingo Frhlich, Michael Traxler, Piotr Salabura, Jerzy Pietraszko Topics: Sta...
RamEthernet
There are two applications: ram2eth file:///misc/hadaq/cvsroot/rpctrbetrax/eth2file response for sending triggers reading RAM1, RAM2 sending this data v...
ReadOut
Contents of README file Requirements: bash xterm awk expect daq_evtbuild daq_netmem daq_sniff Description: * config * This configuration file contai...
RichAdjustThresholds
Adjust Thresholds cat s3r0p6.dat perl ne 'next if (/^#/); ($a, $b)=$_=~/(\d ) (\d )/; if($b s3r0p6.dat_all_1023 postion: sep03/slow/race/adjust_thresholds_fil...
RichCratesRcPrcSetup
Main.MichaelTraxler 02 Feb 2006 * Overview of RICH:
RichFEEandDAQUpgrade
First light : ) Despite the fact the the description below is really outdated, I can pronounce the first really important step from connecting the new RICH ADCM t...
RichHitsObservation
To observe the hits on the Rich detector one has to type: 1 ssh hrich@lxi003 1 bash ; daq_sniff h lxhadesdaq richmonqt Main.MichaelTraxler 14 Sep ...
RichSubSystem
1 RichAdjustThresholds 1 RichHitsObservation 1 Picture of crates and the corresponding RCs and PRCs * boehmer_diplom.pdf: Diploma Thesis of Michael Bhm...
RossendorfDec07Minutes
Main.BurkhardKolb 14 Dec 2007 Agenda: 11.12.07 introduction Attilios Talk about MDC readout via TRB identified projects: TRB Add on board old driver cards ...
RpcDataStructure
TRBv1 structure Word: Contents: Description: # RPC Header 1 size Length of whole subevent 2 0x3001 ...
RunControl
The KISS runcontrol RunControlSoundServer Users Guide 1 http://www hades.gsi.de/~hadaq/doc/aug04/daqop.html Current Documentation for the DAQ operator ...
RunControlBetterHardware
Better Hardware for a better Run Control Some thoughts which functions in readout hardware would be nice to have for supporting the run control. Most of the time...
RunControlBrainStorm
Run Control Brain Storming * Call browser windows from MEDM for input into database (like OV NNM WebLauncher) * Writeup and new thoughts on RunControlStates...
RunControlMU
The MU has the following features: * always readable register: offset 0x07000000 (0xd7000000) * if you can read from address offset 0x02004000 (0xd200...
RunControlSoundServer
The sound server is a "superdaemon" running on "hadesdaq", as well as on hadc08 and lxhadesdaq Install the sound server: * checkout the "tools" module * as ...
RunControlStates
Some thoughts about init/reset/start/stop In the original definition of the run control states it was well definied what transitions from state to state are possi...
RunControlStatesNov00
Data Acquisition and Slow Control name of document daqslow.html version 0.3 author M. M nch date 18 07 2000 draft purpose This document proposes a common understa...
RunControlStatusSummary
Summary of current status in RunControl Frontend Control/Monitoring * IOC on LynxOS works reliable * implementation of "blub_lib" interface to IOC done for...
RunControlTasks
Status and "to do" list for RunControl * error reporting in async record? report via alarm status, how to check? * snc compiler works, but no runtime If cas...
SCSArchiverCSStudio
RDB Archiver based on CS Studio Detailed Table of Content Introduction (from http://cs studio.sourceforge.net/docbook/archive.png) The CS Studio RDB Archiv...
SCSArchiverCSStudioConfigurationScripts
__ $ Hostname : $ Port : $ Database : $ Schema : $ Scripts : Create Database, Users, and Scheme Load Scheme ...
SCSArchiverCSStudioEngineConfiguration
__ pluginCustomization=$ARCHIVER_CSS_TOP/pluginCustomization/ engine_configuration_file= engine_name= engine_port= engine_description= engine_replace= engine_st...
SCSArchiverCSStudioLoadScheme
__ 1. Download postgres_schema.txt from cs studio@github 1. Since GSI already created the database, skip DROP DATABASE, CREATE DATABASE 1. add client...
SCSArchiverCSStudioLoadSchemeGrants
__ 1. Expect postgres_schema.txt 1. Extract GRANT commands and for each user add those GRANTs 1. add client_encoding and "SEARCH PATH" in front 1. cal...
SCSArchiverCSStudioPostgreSqlGsiOverallSchemeCSSEE
SCS Archiver CS Studio PostgreSQL GSI Overall Scheme CSS_EE PostgresQL scheme of css_ee at GSI Schema: css_ee DROP SCHEMA css_ee; CREATE SCHEMA css_ee AU...
SCSArchiverCSStudioPostgreSqlGsiTablesSchemeCSSEE
SCSArchiverCSStudioPostgreSqlGsiTablesSchemeCSSEE Introduction Table: archive_schema DROP TABLE archive_schema; CREATE TABLE archive_schema ( ) WITH ( OIDS...
SCSArchiverCSStudioPostgresCreateDatabaseAndScheme
__ * database_owner_ship provided: 1. add client_encoding and SEARCH PATH 1. if database does not exist, create it 1. call pqsl with ...
SCSArchiverCSStudioPostgresDatabaseConfigurationLocal
__ Configuration Database Configuration Hostname = Port = Name = schema = SSL ...
SCSArchiverCSStudioPostgresInstallationSuse
__ Installation install As root zypper install postgresql postgresql jdbc postgresql server Results in ... Loading repository data... Re...
SCSArchiverCSStudioPostgresPartitioning
__ * database_owner_ship provided: 1. Download postgres_partitioning.txt from cs studio@github 1. Since the table sample is already created, optional...
SCSCPUTable
DCS CPUs and corresponding services Description in Repository: * https://git.gsi.de/HADES/DCS/EPICS/Common/IOC/hades/blob/production/hadesApp/Db/desc_ioc.subst...
SCSChannelArchiver
Channel Archiver Introduction The channel archiver is usually running on lxg0434 visible to the GSI LAN Manuals * Channel Archiver Manual * online: h...
SCSHVcrates
HV mainframes HADES HV Crates Type SY1527LC Serial# Typ Detector place network software release comments 37 SY1527LC TOF ...
SCSLVsupply
LV power supplys Table of SCS controlled LV power supply nodes Name IP Type LAN Version max. Voltage Task/Detector Nominal Vo...
SCSLinuxIoc
IOC for HADES SCS running on Linux Introduction HADES IOC There is an EPICS IOC running under Linux on machine hadesdaq02. Right now, it services * the HV f...
SCSOperatorInterfaces
Operator Interfaces Introduction Sources CVS * Root * :ext:scs@lx pool.gsi.de:/misc/hadesprojects/slowcontrol/cvsroot * Repository * EPICS/op...
SCSOperatorInterfacesIntroduction
Operator Interfaces Introduction Introduction Operator Interfaces are the EPICS clients which connect to the available process variables and show them in a ...
SCSVxWorksBootProcedure
VxWorks boot procedure (hadsc1 and e7had2) The manual boot procedure of the VxWorks is described here (very old manual) The important part of the manual: Before ...
SCSVxWorksIoc
VxWorks VME IOCs for HADES Introduction e7had2 and hadsc1 are the remaining VxWorks OS based EPICS IOCs. This is a collection of informations about this topic. ...
SPIFlashProgramming
SPI controller description The SPI FlashROM controller is attached to RegIO data bus. The user interface consists of two 32bit registers, and one BlockRAM for dat...
SecondRadiationTest
Main.AttilioTarantola 26 Aug 2008 The Optical end point placed at the end of the HADES cave. The logical analyzer connected to hades29. D0: external oscillator D1...
SlowControlToDo
Slow Control ToDo index Detector/System sub system title description aim/solution to be finished link status time stamp comment 1 ...
SlowControlWishList
Slow Control Wish List index Detector/System sub system title description aim/solution to be finished link time stamp ...
SlowControlWishListToDo
Slow Control Wish and ToDo List Introduction Bugzilla http://jspc22.x matter.uni frankfurt.de/rt * Component: EPICS Todo Wish List Main.PeterZumbruc...
SlowControlWishListToDoIntro
SlowControlWishListToDoIntro Introduction This collection is intended to list open wishes and ToDos as a reminder and overview. * RECOMMENDED: Bugzilla at ...
SmokedTRB
The smoked TRB (Serial No. 5) is in repair. After removing the DC/DC converters (48V, 2,5V, 3.0V) there is no short circuit anymore and the ETRAX is working again...
SoftTools
Unpacking, hld unpack_hld.pl The script unpacks the hld file (taking into account big/little endian byte ordering) and stores the output in the array. User can u...
SoftwareDevelopment
Documentation and Logs for Software Development for HADES Daq and Slow Control $ LvmeForConcurrent: Porting the LVME library to Concurrent VME CPU $ HowtoAd...
SoftwareHowToDataAccessBeamtimeAprMay2006
connect_res start/stop connect_res Michael fixed connect_res which was crashing when a connection to the Event Server (hadeb06) was lost. Now connect_res will...
SoftwareImplementation
Display Cornelius Kleiner and Christian Kern 22 Jul 2008 description The entity has 4 inputs and 3 outputs. Input Bits Function Output Bits Funktion ...
SpeedImprovement
Current speed: 1000 Event/sec goal: 5000 Event/sec check waitstates waitstates application: Results: * speed the application with empty loop (it ...
SpiTofRpc
spi_trbv2 The application to set the thresholds for TOF RPC from TRB. It needs the special file with configuration of thresholds(configFile). How To: Log in t...
SpiTrbDiagram
* spi_trbv2 diagram: Programming thresholds for RPC is slow, because the function read32_from_FPGA/write32_to_FPGA has to communicate with FPGA bit by bit. ...
TDCReadoutBoard
TRB (TDC Readout Board for RPC and other tasks) Direct Link to TRBv3 New (Jan. 2011) development for TDC applications TDCReadoutBoardV3 Direct Link to TRBv2 T...
TDCReadoutBoardV2
TRBv2 How To * TRBv2 HowTo Errors found in previous design versions * Things we learned from ETRAX_FS_DEV1 * Errors in TRBv2A * Errors in TRBv2B *...
TDCReadoutBoardV2Beam2012
When restart of the DAQ and reprogramming of the FPGAs does not help First try to login to etraxpXXX Check if the home directory (ls /home/hadaq/) on the Etrax is...
TDCReadoutBoardV2Errors
LIST OF ERRORS FOUND IN THE TRBv2A DESIGN: * Event and bunch reset signals for TDCs come from FPGA to all four TDCs. In V2 those signals are LVDS and FPGA sho...
TDCReadoutBoardV2bErrors
* The add on connector should be: QTE 040 02 (larger distance between TRB and add on, no impact for the user! Main.MichaelTraxler 05 Jun 2007
TDCReadoutBoardV2cErrors
Add connection between temperature sensor and FPGA (additional to connection to Etrax) (Fix on Trbv2: wire from via next to Pin1 of temperature sensor to JP266 te...
TDCReadoutBoardV3
TRBv3 Layout and Feature Proposals * ProposalAndFeaturesTRB3 Finished board TRB3 picture Schematics and Layout * trbv3_SCHEMATIC_michael.pdf: final sc...
TDCprogrammingViaJam
How to generate jam and tcl files In view of growing number of TRBs the make.pl perl script was made to produce jam files with TDC settings and channels enabled/d...
TDVvsMBO
Check that for each sectors the plots tdcvsmb shows data and the hardware reacts to the change in thresholds. You find this plots in the TBrowser monitorDir ...
TOFSubSystem
1 TipSubeventFormat 1 TofSetup 1 TofParams 1 TofCalibration 1 How to to debugging, get really good information: TofDebugging 1 Here are the known T...
TRBAddOns
Here we describe our various AddOn Cards for the TRBv2 HUB AddOn The TRB HUB servers as the trigger fanout module. It has 16 times a 2 GBit/s SFP. The SERDESes a...
TRBBoardErrors
Errors found in previous design versions * Things we learned from ETRAX_FS_DEV1 * Errors in TRBv2A * Errors in TRBv2B * Errors in TRBv2C * Errors f...
TRBBoardStatus
Here the TRB Version 1 are listed where they are used and their current status de etrax where status additional information last update 001 cracow Ok ...
TRBFeaturesAndSoftware
List of Features and special codes for TRB * Using jam to program FPGAs * Programming the Flash on TRB * SPI to configure TDCs for TOF and RPC * Sourc...
TRBProgressReports
Radek TIPS about DAQ, kernel, etc. manual about DAQ readout scripts TRBvIIHowTo for trb v2 AnaSimMay07 1 Quantum Mechanic very well ...
TRBPublicationList
TRB Publication List Here we should collect all available presentations/talks/papers Please also put all information about location and date. 2006 * TRBv2_Sc...
TRBSchematicsCollection
Schematics collection * can be found here: DaqSlowControl.TDCReadoutBoardV2#Schematics_Pinout_and_Patches_of Main.MichaelTraxler 17 Dec 2007
TRBSourceList
Source codes for etrax fs on hadeb05.gsi.de: binary file description ...
TRBTigerSHARC
TigerSHARC PIN Number of CMOS PINs Comments PINs connected to Virtex4 SCLKRAT 3 PLL muliplier, can be hardwired to 000 at 125MHz 0 SCLK 1...
TRBUseDocumentation
Main.MichaelTraxler 22 Nov 2005 CPLD on board configuration The usage of CPLD is involved with SWITCH2 and also with register in FPGA. Vi this CPLD we can progra...
TRBvIIHowTo
How to use the TRBv2 * How to start * How to start readout * DescriptionOfEtrax * DescriptionOfFPGA * DescriptionOfTDC Main.MarekPalka 27 Jun 2...
TclToOra
Table of contents: The following programs are used to connect to a Hades database: * runinfo2ora.pl * tcl_to_ora runinfo2ora.pl Intro To simplify the pro...
TestInterWikiInclude
EpicsAtGsi:Epics/WebHome Main.PeterZumbruch 17 Jan 2018
TestLogBook
All tables can be edited directly. Use the "Edit table" button underneath each table! Logs for all tests Here are some tables to collect all necessary data for a...
TestsAndAnalysisResultsMDCI
HLD Files Here a list of all taken hld files should be maintained. Filenames should be given without extension. All files are to be recorded in a new subdirectory...
TestsAndAnalysisResultsMDCII
HLD Files Here a list of all taken hld files should be maintained. Filenames should be given without extension. All files are to be recorded in a new subdirectory...
TestsAndAnalysisResultsMDCIII
HLD Files Here a list of all taken hld files should be maintained. Filenames should be given without extension. All files are to be recorded in a new subdirectory...
TestsAndAnalysisResultsMDCIV
HLD Files Here a list of all taken hld files should be maintained. Filenames should be given without extension. All files are to be recorded in a new subdirectory...
TestsMDCI
Here a list of all taken hld files should be maintained. All files are to be recorded in: hadaq@lxhadeb01:/data01/data MDC I Sector 0 MDC I Sector 1 MDC I Sec...
TestsMDCII
test of MDC II performed day: 29.03.2011 We have collected only calibration events, by setting: trigger type 9 on and pulser 10Hz. Threshold has been set to 40 ...
TestsMDCIII
Here a list of all taken hld files should be maintained. All files are to be recorded in: hadaq@lxhadeb01:/data01/data MDC III Sector 0 MDC III Sector 1 MDC I...
TestsMDCIV
Here a list of all taken hld files should be maintained. All files are to be recorded in: hadaq@lxhadeb01:/data01/data MDC IV Sector 0 MDC IV Sector 1 MDC IV ...
TestsinCave
Tests in the Cave Test with internal CMS * yellow: CMS * purple: Token In * green: Token Out * red: Analog Out Main.KathrinGoebel 19 Jun 2009
ThingsToDo
Table of contents: What we have to do.... 1 Ask for a public Wiki group (Hadespub ???) where we can store info for outside people. Nearly all hades pages are...
TipSubeventFormat
TDC header (defined by CAEN) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4...
TofBugs
TIP shows permanent bus errors If the error log shows messages like this: e7_21 tipctrl 26 : tof2tip: Bus Error Workaround: Please stop DAQ, close hadaq and re...
TofCalibration
The TIP has to provide theta and phi of lepton candidates for the Matching Unit. Therefore it needes the calibration parameters of the TOF detector. There is no a...
TofDebugging
(NL) is a number of line counter tip_readout (DSP1) tipdebug sniff1 tof1tip (NL) CT:5 X:6100 MC:6407 MS:20040 1:1445d2 1T:0 1P: 3 2 :8b6c1 2 :b8f0e CT: which ...
TofParams
In a nutshell: To remove tof completely from the LVL2 trigger and use tip only as a readout board, change * set g_master_control expr 0x6 $async_mode to...
TofSetup
This is the page where all TOF modules are described If you make changes (in particular TOF4) please update this page TIP modules Module Label Description ...
ToolsHiddenSection
__ Introduction Code section to be included directly in front of a section to be hidden at beginning. Can be included via %INCLUDE{"ToolsHiddenSection" section="...
TrbAddOnErrors
Errors found in the MDC Optical AddOn1 design 1 The silk screen (text on the PCB) of the LEDs are not corresponding to the FOT number. So, e.g. FOT13 has a LED...
TrbDmaReadout
main.pdf: closer description. * readout with dma, v1. frame of event is creating in readout function, result: 80kEv/s 15words/event . * dma v2, where...
TrbNet
Abbreviation for TRB Network Main.MichaelTraxler 24 Jun 2009
TrbNetAddresses
Network Addresses Each network member needs an unique 16Bit address. A network member is not necessarily equal to some piece of hardware: A normal TRB2 board has ...
TrbNetConfiguration
Network configuration A lot of parameters cn be set using the generics in each top entity. Nevertheless, some of these have to be common for all network devices. ...
TrbNetDatafields
Common definitions for the use of TRBNets datafields Packet types The packet type is sent with each 64 bit packet Name Type Description F1 F2 F3 ...
TrbNetEndpoints
Endpoints There are some ready to use endpoints. These endpoints are named accordingly to their kind and number of interfaces: For example "trb_net16_endpoint_0_t...
TrbNetEntities
Overview The "normal" TrbNetEndPoint consists of up to 16 TrbNetIOBUF. Special endpoints for dedicated reasons have only a subset of TrbNetIOBUF in order to keep ...
TrbNetFifo
Overview Wrapper entity for various fifos. The design files for the different fpgas can also be found in the cvs, as xco configuration files for the xilinx corege...
TrbNetFiles
TRBNet Files This is a list of files found in the cvs. The optical link is missing at the moment. Low level parts Fifos $ trb_net_fifo: A standard fifo entit...
TrbNetHub
General information A hub is, like in any other network, a logical unit that merges the data coming in on different lines and sends it out on every other line. ...
TrbNetIBUF
Overview The TrbNetIBUF is buffering the data coming from the media. All word which are offered by the media must be read, otherwise something is completly wrong ...
TrbNetIOBUF
Overview The TrbNetIOBUF is the basic element which controls the connection between the media layer (after de multiplexing of the individual channels) and the Fan...
TrbNetIOMultiplexer
Overview The multiplexer, which has more than one port on the internal side, and one port only on the media side. Signal description Media direction port Inter...
TrbNetIPUChannel
IPU Data Channel Data Format The request to start readout of the data of a specific event is the same as the trigger information delivered on the LVL1 trigger ch...
TrbNetInterfaces
Interfaces The TRB Endpoints are all using the same interfaces. There is a media independent interface (MII) on the network side. On the application side of the e...
TrbNetMediaInterfaces
Media Interfaces For every kind of network medium we need an dedicated media interface. For example there is an lvds interface (200MBit), an optical link interfac...
TrbNetMonitoring
Main.BorislavMilanovic 27 Jul 2009 TRBnet Monitoring System On this page, the new monitoring facility for the TrbNet will be presented. Any user may feel free to...
TrbNetOBUF
Overview The TrbNetOBUF is controlling what data content is leaving the hub. Signal description Media direction port (similar as described in NewTriggerBusMedia...
TrbNetOnewire
Trb Net Onewire interface This entity provides a very simple 1 wire master to read out the id of a 1 wire device. It does not support busses with more than one de...
TrbNetPriorityArbiter
Overview The TrbNetPriorityArbiter takes an INPUT_IN pattern and generate an RESULT_OUT pattern with only one bit enabled. Fixed priority is possible as well as r...
TrbNetRegIO
Reading and Writing registers over the network TrbNetRegIO is a simple interface to read and write registers inside your application from anywhere on the network....
TrbNetStreamedEventBuilding
Streamed Event Building The name "streamed event building" comes from the fact that inside the network there is no place where we can guarantee to be able to stor...
TrbNetStreamingAPI
Trbnet Streaming API A streaming API allows an application to be inserted into the data stream. There it can fullfill two different tasks: It can simply preproces...
TrbNetUsersGuide
Overview $ trbnet_full_endpoint.pdf : The hades_full_endpoint entity is the central part to connect to the network. Overview Short description of the ports ...
TrbPatches
AddOns The pictures shown are a sized down. Download the file from the table to see the high resolution version. Trb2 B Connect Temperature Sensor to FPGA: Via o...
TrbV2ConnectorsPinout
Connector A (JADDON1) With these connectors (JADDON1 and JADDON2) the Add on board communicates with the TRBv2 board: it receives trigger information and basicall...
TreeViewLink
Main.MichaelTraxler 15 Jul 2010
TriggerBox
SEP05 settings (since Sep 26 16:00 ) Input Number Input Signal Source Down Scaling 2^X ON / OFF 1 M4 0x5 ON 2 ...
TriggerCodes
This text is stolen from Michael Bhmer: http://www hades.gsi.de/daq/rc99/richel_page.html A summary of the HADES trigger codes On this page you can find a summar...
TriggerDistribution
HADES Trigger Distribution System DTU/CTU Manual from Eric * DTU_technical_manual.pdf: DTU / CTU manual * DTU_schematics.pdf: Schematics of DTU CTU/DTU i...
TriggerHub
This is the curent TriggerHub cabling: We definitely need both hub symmetrical, since the UI uses the same template for both Main.MathiasMuench 29 Jan 2005 ...
TriggerLvl1Information
LVL1 Trigger Definitions * All information about LVL1 triggers will be sent in a packet using TrbNet and the optical network. * A fast trigger strobe for ...
TriggerModule
New Trigger unit based on the universal logic module VULOM3 New Trigger unit based on the universal logic module (Jan Hofmann, GSI) Author: Wolfgang Koenig (load...
UpdatedLogbook
UpdatedLogbook * 04.02.2011 * Start test in cave (AT) .... Main.AttilioTarantola 03 Feb 2011
VHDLCodeInformation
General Information about VHDL Code 1 Recommendations for a common VHDL code style 1 Using VHDL Constraints Main.JanMichel 03 Jul 2007
VHDLCodeStyle
Hardware programming guidelines * Synchronous design * synchronization of external signals (at very high frequencies use two register) * never...
VHDLConstraints
Information on using VHDL Constraints Lattice constraints Constraints for Lattice FPGAs should be located in a separate LPF file, especially if these constraints...
VMEAddressesForEveryGivenRegister
VME addresses for every given register This is the official source of information. Address Description comments offset (hex) ...
VMEHandbookScan
VME info Main.MichaelTraxler 27 Jan 2006 * VME_Handbook_Pindefinition.pdf: Pins on the VME backplane * VME_Handbook_Interrupts.pdf: Interrupts * VME_...
VNCRemoteAccess
VNC connection to hadesdaq and the problems For some unknown reasons the vnc connection (just the authentification) to hadesdaq is not working reliably. The follo...
VULOM3Triggerbox
Level 1 trigger processing by VULOM3 board The old triggerbox has now been replaced by an FPGA module and can be remotely controlled by EPICS. Here is provided so...
ViewLogic
Graphical design system for logic designs. Main.MichaelBoehmer 20 Mar 2007
WebHome
The Hades Data Aquisition and Slow Control System Welcome to the DaqSlowControl web used by .HadesDaqSlowControlGroup. Please use this tool frequently and add/cha...
WebIndex
See also the faster WebTopicList
WebNotify
This is a subscription service to be automatically notified by e mail when topics change in this DaqSlowControl web. This is a convenient service, so you do not h...
WebPreferences
DaqSlowControl Web Preferences The following settings are web preferences of the DaqSlowControl web. These preferences overwrite the site level preferences in ., ...
WebRss
Foswiki's DaqSlowControl web /view/DaqSlowControl The DaqSlowControl web of TWiki. TWiki is a Web Based Collaboration Platform for the Corporate World.
WebStatistics
Statistics for DaqSlowControl Web Month: Topic views: Topic saves: File uploads: Most popular topic views: Top contributors for topic save and up...
WebTopicList
See also the verbose WebIndex.
WorkLogBook
Logbook Installation: INNER planes Task Plane 1/2 Sector 1 Plane 1/2 Sector 2 Plane 1/2 Sector 3 Plane 1/2 Sector 4 Plane 1/2 Sector 5 Plane 1/2 Se...
XilinxPart
Main.MarekPalka 29 May 2006 Xilinx registers Address 0x0: bits 7 6 5 4 3 2 1 0 TDO of jtag port CY_config_done pin status ...
Number of topics: 314

See also the faster WebTopicList
Topic revision: r2 - 2001-11-24, PeterThoeny
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